User manual ANTEC 902

[. . . ] Intel® Core™ i7-800 and i5-700 Desktop Processor Series and LGA1156 Socket Thermal/Mechanical Specifications and Design Guidelines September 2009 Document Number:322167-002 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, or life sustaining applications. [. . . ] The TCC activation temperature is calibrated on a part-by-part basis and normal factory variation may result in the actual TCC activation temperature being higher than the value listed in the register. TCC activation temperatures may change based on processor stepping, frequency or manufacturing efficiencies. 40 Thermal/Mechanical Specifications and Design Guidelines Thermal Specifications 6. 2. 2 Adaptive Thermal Monitor The Adaptive Thermal Monitor feature provides an enhanced method for controlling the processor temperature when the processor silicon exceeds the Thermal Control Circuit (TCC) activation temperature. Adaptive Thermal Monitor uses TCC activation to reduce processor power via a combination of methods. The first method (Frequency/VID control, similar to Intel® Thermal Monitor 2 (TM2) in previous generation processors) involves the processor reducing its operating frequency (using the core ratio multiplier) and input voltage (using the VID signals). This combination of lower frequency and VID results in a reduction of the processor power consumption. The second method (clock modulation, known as Intel® Thermal Monitor 1 or TM1 in previous generation processors) reduces power consumption by modulating (starting and stopping) the internal processor core clocks. The processor intelligently selects the appropriate TCC method to use on a dynamic basis. BIOS is not required to select a specific method (as with previous-generation processors supporting TM1 or TM2). The temperature at which Adaptive Thermal Monitor activates the Thermal Control Circuit is factory calibrated and is not user configurable. Snooping and interrupt processing are performed in the normal manner while the TCC is active. When the TCC activation temperature is reached, the processor will initiate TM2 in attempt to reduce its temperature. If TM2 is unable to reduce the processor temperature then TM1 will be also be activated. TM1 and TM2 will work together (clocks will be modulated at the lowest frequency ratio) to reduce power dissipation and temperature. With a properly designed and characterized thermal solution, it is anticipated that the TCC would only be activated for very short periods of time when running the most power intensive applications. The processor performance impact due to these brief periods of TCC activation is expected to be so minor that it would be immeasurable. An under-designed thermal solution that is not able to prevent excessive activation of the TCC in the anticipated ambient environment may cause a noticeable performance loss, and in some cases may result in a TCASE that exceeds the specified maximum temperature and may affect the long-term reliability of the processor. In addition, a thermal solution that is significantly under-designed may not be capable of cooling the processor even when the TCC is active continuously. Refer to the appropriate Thermal Mechanical Design Guidelines for information on designing a compliant thermal solution. The Intel Thermal Monitor does not require any additional hardware, software drivers, or interrupt handling routines. The following sections provide more details on the different TCC mechanisms used by the processor. 6. 2. 2. 1 Frequency/VID Control When the Digital Temperature Sensor (DTS) reaches a value of 0 (DTS temperatures reported using PECI may not equal zero when PROCHOT# is activated, see Section 6. 3 for further details), the TCC will be activated and the PROCHOT# signal will be asserted. This indicates the processors' temperature has met or exceeded the factory calibrated trip temperature and it will take action to reduce the temperature. Upon activation of the TCC, the processor will stop the core clocks, reduce the core ratio multiplier by 1 ratio, and restart the clocks. [. . . ] BOX 58119 SANTA CLARA, CA 95052-8119 A1 SCALE: SIZE DRAWING NUMBER E27147 5 DO NOT SCALE DRAWING SHEET REV 4 4 OF 4 8 7 6 5 4 3 2 1 93 Socket Mechanical Drawings 94 Thermal/Mechanical Specifications and Design Guidelines Package Mechanical Drawings D Package Mechanical Drawings Table D-1 lists the mechanical drawings included in this appendix. Table D-1. Mechanical Drawing List Drawing Description “Processor Package Drawing (Sheet 1 of 2)” “Processor Package Drawing (Sheet 2 of 2)” Figure Number Figure D-1 Figure D-2 Thermal/Mechanical Specifications and Design Guidelines 95 Figure D-1. Processor Package Drawing (Sheet 1 of 2) 96 7 DWG. NO 8 E22526 SHT. 6 1 REV 5 4 3 2 6 H B 1 C 1 C 3 H 1 G 1 D THIS DRAWING CONTAINS INTEL CORPORAT ION CONFIDENTIAL INFORMATION. IT IS DISCLOSED IN CONFIDENCE AND ITS CONT ENTS MAY NOT BE DISCLOSED, REPRODUCED, DI SPLAYED OR MODIFIED, WITHOUT THE PRI OR WRITTEN CONSENT OF INTEL CORPORAT ION. H C C C 4 G G F C 2 2 B A A G F 2 H E J 2 2 E C PIN #1 D 1 E DETAIL C SCALE 15 SUBSTRATE ALIGNMENT FIDICAL J 1 SEE DETAIL A D 0. 203 C 0. 05 D B SYMBOL MIN B 1 2 1 2 3 4 1 2 F G 4 1 G H H J J 2 1 2 1 2 4. 112 2. 331 1. 3 2. 2 0. 625 4. 602 2. 843 35. 6616 BASIC 35. 6616 BASIC 17. 8308 BASIC 33. 9 31. 72 31. 92 34. 1 1. 4 2. 3 37. 45 37. 55 37. 45 37. 55 B C C C C MAX MILLIMETERS 0. 175 SECTION COMMENTS 0. 203 C 0. 08 IHS SEALANT 1 1 C E C D IHS LID C C A-A PACKAGE SUBSTRATE C F F 4 2 2X M 1 D F B SYMBOL MILLIMETERS COMMENTS MIN M 1 2 3 1 0. 13 0. 1 0. 52 0. 2 M M RM MAX 2X M 6X RM 1 3 0. 021 SOLDER RESIST DETAIL B SCALE 15 C B DESIGNED BY DATE DEPARTMENT R 0. 15 C D E 17. 8308 BASIC 0. 9144 BASIC 0. 9144 BASIC 2X M 2 DRAWN BY CHECKED BY DATE DATE 2200 MISSION COLLEGE BLVD. [. . . ]