User manual CADENCE DESIGN SYSTEMS VIRTUOSO ANALOG DESIGN ENVIRONMENT XL DATASHEET

[. . . ] VIRTUOSOANALOGDESIGN ENVIRONMENTL, XL&GXL DATASHEET FAMILY OVERVIEW TheVirtuosoAnalogDesignEnvironment productsuiteprovidesallthecapabilities requiredtofullyexplore, analyze, and verifyadesignagainsttheuser'sdesired goals. Astheindustry'sleadingsolution foranalogsimulationcontroland management, itallowsuserstoflexibly selectthetierthatbestsupportstheir designgoalsastheymovethroughthe designflow. AnalogDesignEnvironment Lprovidesaquickentryintotheanalysis processwitheasyentryandexecutionof simulations. AnalogDesignEnvironment XLextendstheLtiercapabilities, providingmultipletestsupport, analysis oversweeps, corners, andMonte Carlo, andeasyreviewingofallresults directlyorasadatasheet. AnalogDesign EnvironmentGXLbuildsontheAnalog DesignEnvironmentLandXLcapabilities byprovidingtargetedtoolsthataidwith keydesignchallengeswithearlyparasitic analysis, designcentering, anddesigning inmulti-technologies. TheCadence®Virtuoso®AnalogDesignEnvironmentfamily ofproductsprovidesacomprehensivearrayofcapabilitiesfor theelectricalanalysisandverificationofanalog/mixed-signal designs, includingtheflexibilitytointegrateintoavarietyof customflows. ThefamilyincludesVirtuosoAnalogDesign EnvironmentL, VirtuosoAnalogDesignEnvironmentXL, and VirtuosoAnalogDesignEnvironmentGXL. FAMILY BENEFITS · Providesbuilt-insupportforallVirtuoso simulatorswithintegrationsupportfor third-partysimulators · Supportsmultipletestmethodologiesto fullyexploreandvalidatedesigns · Acceleratesdesigndebugusinga varietyofbuilt-inanalysistools · Facilitatesearlycorrectionviaeasy evaluationofpre-andpost-layout parasiticeffects Family Features at a Glance Single-testdesignanalysisandexploration ScriptsupportthroughOCEAN Virtuosoandthird-partysimulatorsupport Multi-testverificationandextendedanalyses Flexiblecornersanalysis ExtendedvisualizationspeedwithPSFXL Pre-andpost-layoutparasiticanalysis DesignCharacterizationandmodeling Designcenteringandyieldoptimization · Circuitproblemsarequicklydetected andexploredviaaclearvisualization cockpit · Offersintegrateddocumentation andfastwaveformvisualizationacross alltests · Supportsmanualorautomated designevaluationandsizingtotarget specifications · Providesatieredsetofcapabilitiesto supportavarietyofdesignflowsand designchallenges ADE L · · · ADE XL · · · · · · ADE GXL · · · · · · · · · VIRTUOSO ANALOG DESIGN ENVIRONMENT L OVERVIEW TheVirtuosoAnalogDesignEnvironment Listheentry-levelanalogdesignand simulationenvironmentfortheVirtuoso customdesignplatform. AnalogDesign EnvironmentListheindustry'sleading task-basedenvironmentforsimulating andanalyzingfull-custom, analog, and RFICdesigns. Itfeaturesagraphicaluser interface, integratedwaveformdisplay, distributedprocessing, andinterfacesto popularthird-partysimulators. Aspartof theAnalogDesignEnvironmentfamily, AnalogDesignEnvironmentLprovidesthe foundationtofacilitateextendeddesign analysisandvalidationintotheAnalog DesignEnvironmentXLandAnalog DesignEnvironmentGXLproducts. Virtuoso Analog Design Environment L: Single-test Environment BENEFITS · Reducedlearningcurvewitha simulator-independentenvironment · Maximumefficiencyinthe script-drivenmode · CloseintegrationwithVirtuoso SchematicEditorforinteractiveanalysis · Easydesignandtestparameterization forfastcircuitexploration · Configurablewindowforoptimum displayofrelevantdata · Integratedvisualizationcockpitfor explorationofsimulationresults · Extractquantifiableresultswithbuilt-in calculatorandextensivelistoffunctions FEATURES EASY-TO-USE INTERACTIVE SIMULATION ENVIRONMENT Theinteractiveenvironmenthas everythingusersneedtoset-up, run, andanalyzeresultswithanyintegrated simulator. Itoffersavarietyoftoolsfor displayingandanalyzingresults, giving designerstheflexibilitytovisualizeand understandthemanyinterdependencies ofananalog, RF, ormixed-signaldesign. [. . . ] OCEANisbasedontheCadenceSKILL programminglanguagefordevelopment ofmorecomplexanalysis. Itcanbeused tosetup, run, andpostprocessresults inabatch-orientedmethodology. Lastly, VirtuosoAnalogDesignEnvironmentL includesthecapabilitytointerface withothercommerciallyavailableand in-housesimulatorsthroughtheOASIS Integrator'sKit. fortheaxes, waveformcolorsandlabels sothatyoucanmakeprofessionalplots foryourreports. Waveformmarkersand abuilt-inwaveformcalculatorallow accuratemeasurementofsignalsina varietyofdifferentmodes, including transient, ACandRF. Thecalculator's algebraicexpressionscanbecomposed ofanycombinationofinputoroutput voltagesorcurrents. INTEGRAL PART OF THE VIRTUOSO CUSTOM DESIGN PLATFORM VirtuosoAnalogDesignEnvironment LisanintegralpartoftheVirtuoso customdesignplatform. Itbridgesthe gapbetweenschematicdesignand physicallayoutbyprovidingasimulation environmentwherethedesignercan comparedesignsinbothpre-andpostextractedforms, therebycompleting theCadenceICdesignflow. Itsupports analogsystemtoICdesignmethods withcompleteaccesstobehavioral modelinglanguagesforbothsimulation andcross-probingforwaveformdisplay. Post-simulationoperatingconditioncan beeasilyannotatedbacktotheschematic withnetvoltages, currents, anddevice operatinginformation. BUILT-IN WAVEFORM DISPLAY AND SIGNAL ANALYSIS CAPABILITIES Thewaveformdisplaytool, coupled withanextensivewaveformcalculator, providesacomprehensivepost-simulation analysisenvironment. Thewaveform windowcanhandlealltypesofanalog andmixed-signaldata, includingadvanced displayssuchasnoise, corner, statistical, andRFplots. Additionally, itcontainsa varietyofchangeabledisplayattributes www. cadence. com VIRTUOSOANALOGDESIGNENVIRONMENTL, XL&GXL 2 SPECIFICATIONS INTERACTIVE SIMULATION ENVIRONMENT · Easytolearnandeasytoenterdata · Easyre-useofsimulationset-ups · Cleardisplaysofsimulationinformation · Cross-probingsupportforboth schematicsandlayouts · Designvariablesupportwithabilityto createdependentexpressions · Auto-plottingandprintingof simulationdata · Batchscripting · Schematicannotationofnodevoltages anddeviceinformation · OASISintegrationofacustomer proprietaryorthird-partysimulator VIRTUOSO ANALOG DESIGN ENVIRONMENT XL OVERVIEW VirtuosoAnalogDesignEnvironmentXL istheadvanceddesignandsimulation environmentfortheVirtuosoplatform. Bysupportingextensiveexplorationof multipledesignsagainsttheirobjective specifications, itsetsthestandardin thorough, fastandaccuratedesign verification. · Simplifiesdesignreviewsthrough integraldocumentation, specifications, measurementresults, andwaveforms · CloselyintegratedwithVirtuoso SchematicEditorforfasttest developmentanddebug FEATURES SPECIFICATION-DRIVEN DESIGN Toacceleratedesignverification, VirtuosoAnalogDesignEnvironmentXL combinesspecificationentryanddesign managementinasingleunifiedcockpit. A specificationconsistsofallrequiredtests, allrequiredanalyses, andallrequired operatingconditionsforvalidationagainst ameasuredsetofgoals. WithVirtuoso SchematicEditorXL, developmentof multipletestsiseasy, alongwithall thedifferentconditionstovalidatea design'sperformanceagainstthetarget specification. EachAnalogDesignEnvironmentXL sessioncanbetreatedasaproject, providingaccesstoallthetests, sweeps, corners, scripts, anddocumentation neededtocompletelyvalidateadesign againstthedesigner'sintent. BENEFITS · Supportshighfaultcoverageofdesigns withextensiveverificationoverprocess environmentalandoperatingconditions · Analysissupportofmultiplesimulators acrossmultipletestsandmultiple conditionsforthoroughdesign validation, compilingresultsinasingle easy-to-usedatabase · Supportforcorners, parametricsweeps, andMonteCarlo · Quickcolor-codedfeedbackofall resultsagainsttargetspecifications · Optimumanalysisthroughputwith simulationdistributionandmulti-test managementacrossuser-preferredload balancingsoftware WAVEFORM DISPLAY · Supportsmultipley-axes, stripplots, andSmithCharts · Built-inwaveformcalculator · Independentsub-windowdisplays · Horizontalandverticalmeasurement markers · Independentpanandzoomcapability · User-definedlabelsandtitles · Colorandlinestylecontrols · Signalbrowser · Color-coordinatedcross-probingto schematics DISTRIBUTED PROCESSING · Distributionofmultiplesimulations · Efficientuseofexistingcomputerfarms · Built-inbasicloadbalancingorinterface tootherloadbalancingtools · Jobmonitoringandcontrolling functions · Graphicaluserinterfacesforset-upand viewingstatus Virtuoso Analog Design Environment XL: Mult-test Environment www. cadence. com VIRTUOSOANALOGDESIGNENVIRONMENTL, XL&GXL 3 FLEXIBLE SIMULATION MANAGEMENT Anoverviewofallthetestsin developmentisavailablethroughthe testassistant, whichallowseasyaccess toadd, deleteandeditallrequired testconfigurationsandanalysesto fullyvalidateadesign. Thesedefined testscanbefurthermanagedwithtest configurationsthatsupportdifferent testingstrategiesatdifferentpointsinthe designdevelopment/validationflow. Bygivinguserstheabilitytocreate extensivetesting, VirtuosoAnalogDesign EnvironmentXLprovidestheabilityto managetheparallelizedsimulationswith eithertheinternalloadbalancingsystem orwithanoptionalthird-partysolution. SPECIFICATIONS INTERACTIVE SIMULATION CONTROL · IntegratesAnalogDesignEnvironmentL capabilitiesforsingletestoperation · Designexplorationwithsweeps, corners, andMonteCarloanalysis · Supportsmatchingandcorrelation constraintsfromVirtuosoSchematic EditorXL · Incrementalre-simulation · Creationandtrackingofparametric dependenciesamongtestsformore complexanalysis · IntegratedwithVirtuosoMulti-Mode Simulation · Abilitytosavedifferenttest configurationsfordifferentstepsinthe testingflow · Parallelanalysisovermultipletestsandall requiredcorners · BatchscriptingsupportthroughOCEANXL VIRTUOSO ANALOG DESIGN ENVIRONMENT GXL OVERVIEW VirtuosoAnalogDesignEnvironment GXLusesthesameadvanceddesign andsimulationcockpitasAnalogDesign EnvironmentXLandincludesextended analysiscapabilitiesformoredetaileddesign exploration. Ausercanchoosetolaunch AnalogDesignEnvironmentGXLdirectlyor justaccesstheadditionalanalysiscapabilities fromAnalogDesignEnvironmentXL. BENEFITS · Extendeddesignexplorationwith SensitivityandMismatchanalysis · Advancedoptimizationalgorithms improvedesigncenteringandyield · Built-inparasiticestimationflowhelps toquicklyidentifyparasiticsensitivities priortolayout · Supportformultipletechnologiesto facilitatemulti-chipdesignanalysis · Modelcalibrationandvalidation supportforVerilog®AandVerilogAMS languages · GeneratesLibertyandWrealmodels fromsimulationresultsforsystemlevel simulation VISUAL COCKPIT EASES DESIGN VERIFICATION Anoverviewofallthetests, simulators usedandanalysisconducted(alongwith anydefinedvariablesandcorners)islisted ineasyviewontheDataViewassistant screen. Resultsofthelatestanalysis appearinatabularviewontherightside, withcolorcodingtoshowataglancethe simulationresultsthatpassorfailagainst thetargetspecification. Theresultscan bereorderedortransposedforbetter visualization. Userscaneasilyexplore resultsinmoredetailbyrightclickingon anysingleresultorsetofresultsthatpop upinVirtuosoVisualizationandAnalysis XL, whichisincludedinAnalogDesign EnvironmentXL. Inaddition, ahistory ofresultsisautomaticallymaintained souserscanquicklygobacktolook atpreviousresultsorevenresultsfrom differenttestconfigurations. RESULTS ANALYSIS AND VISUALIZATION · Creationofspecificationsdirectlyfrom simulationresults · Quickoverviewwindowoftestresults againsttargetspecification · Cross-probingandannotationto schematicsandlayout · Calculator, OCEAN, MDL, andMATLAB measurementstrategies · IntegratedVirtuosoVisualizationand AnalysisXLforfastwaveformanalysis · Integraldocumentationcreationand supportforText, HTML, andPDF · Historyofpriorresultswiththeability tocompareanytwosetsofdata · Measuredresultsaresavedalongwith thetestsasalib/cell/viewforeasy designmanagement INTEGRAL PART OF THE VIRTUOSO CUSTOM DESIGN PLATFORM VirtuosoAnalogDesignEnvironmentXL buildsuponthefeaturesandinfrastructure ofVirtuosoAnalogDesignEnvironmentL, providingcohesiveoperationfortheuser. Forcircuitsrequiringhighdesignmargins www. cadence. com VIRTUOSOANALOGDESIGNENVIRONMENTL, XL&GXL 5 THIRD-PARTY SUPPORT Interfacesupportforallcommercialcircuit simulators, includingSynopsysHspice, MentorGraphicsEldo, SilvacoSmartSpice, andAgilentADS. Inaddition, userscan integratetheirownproprietarycircuit simulator. PLATFORM/OS · X86Linux · SunSolaris · IBMAIX DESIGN INPUTS · OpenAccessdataobjects · Cadenceproprietarylanguages:OCEAN andMDL · SPICEnetlists · Circuitdesignlanguage(CDL) · SPICE · VHDLIEEE1076-1993 · VerilogIEEE1364 · SKILL · PSFandPSFXLwaveformformats · SST2waveformformat · CadenceSKILL CADENCE SERVICES AND SUPPORT · Cadenceapplicationengineerscan answeryourtechnicalquestionsby telephone, email, orInternet--theycan alsoprovidetechnicalassistanceand customtraining · Cadencecertifiedinstructorsteach morethan70coursesandbring theirreal-worldexperienceintothe classroom · Morethan25InternetLearningSeries (iLS)onlinecoursesallowyouthe flexibilityoftrainingatyourown computerviatheInternet ·CadenceOnlineSupportgivesyou 24x7onlineaccesstoaknowledgebase ofthelatestsolutions, technical documentation, softwaredownloads, andmore DESIGN OUTPUTS · XMLdatabase · PSFandPSFXL · SST2 · CommaSeparateValue · Cadenceproprietaryscriptlanguage: OCEAN For more information contact Cadence sales at: +1. 408. 943. 1234 or log on to: www. cadence. com/ contact_us © 2010 Cadence Design Systems, Inc. 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