User manual FUJITSU SIEMENS SCENIC E620 (I915G)

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Manual abstract: user guide FUJITSU SIEMENS SCENIC E620 (I915G)

Detailed instructions for use are in the User's Guide.

[. . . ] any technical problem or other question you need clarified?Please contact: · one of our service partners · your sales partner · your sales outlet The addresses of your service partners are contained in the guarantee booklet or in the service address booklet. The latest information on our products, tips, updates, etc. , can be found on the Internet under: http://www. fujitsu-siemens. com Dieses Handbuch wurde auf Recycling-Papier gedruckt. This manual has been printed on recycled paper. [. . . ] Be especially careful with the locking mechanisms (catches, centering pins etc. ) when you replace the system board or components on it, for example memory modules or processors. Never use sharp objects (screwdrivers) for leverage. Boards with electrostatic sensitive devices (ESD) are identifiable by the label shown. When you handle boards fitted with ESDs, you must observe the following points under all circumstances: · · · · · You must always discharge yourself (e. g. by touching a grounded object) before working. The equipment and tools you use must be free of static charges. Pull out the power plug before inserting or pulling out boards containing ESDs. Always hold boards with ESDs by their edges. Never touch pins or conductors on boards fitted with ESDs. 2 - English A26361-D1115-Z120-10-7419 Features Features The components and connectors marked do not have to be present on the system board. · · · · · · · · · · or or or System board in micro ATX format Intel Pentium II processor with 100 MHz or 66 MHz Front Side Bus for slot 1 processor socket Intel Pentium III processor with 100 MHz Front Side Bus for slot 1 processor socket Intel Celeron processor with 66 MHz Front Side Bus for slot 1 processor socket Intel Pentium II / III and Celeron processors support MMX technology. Size and frequency of firstlevel cache and second-level cache are depending on the processor used. Intel chipset 440ZX / PIIX4E Intel chipset 440BX / PIIX4E 2 DIMM slots for 16 to 256 Mbyte (Intel chipset 440ZX / PIIX4E) or 512 Mbyte (Intel chipset 440BX / PIIX4E) main memory (SDRAM memory modules) Flash BIOS Energy saving functions: ACPI and APM. Press the clamps (2) on either side of the processor slightly inwards (A) or outwards (B) and pull the processor up and out. Use a screwdriver if necessary. A26361-D1115-Z120-10-7419 English - 11 Add-on modules Upgrading main memory These slots are suitable for 16, 32, 64 and 128 Mbyte memory modules of the DIMM format. Additionally the Intel chipset 440BX / PIIX4E supports 256 Mbyte SDRAM memory modules. Memory modules with different memory capacities can be combined. DIMM = Dual Inline Memory Module SDRAM = Synchronous Dynamic Random Access Memory ! You may only use unbuffered 3. 3V memory modules. Buffered memory modules are not permitted. SDRAM memory modules must be designed for a clock frequency of 100 MHz or higher (meets PC100 specification). Installing memory modules 2 2 Ê Ê Ê Flip the holders on each side of the relevant location outwards. Insert the memory module into the location (1). At the same time flip the lateral holders upwards until the memory module snaps in place (2). Removing a memory module 1 1 Ê Ê Flip the holders to the right and left of the location outwards (1). Pull the memory module out of its location (2). 12 - English A26361-D1115-Z120-10-7419 Add-on modules Replacing the lithium battery ! Incorrect replacement of the lithium battery may lead to a risk of explosion. The lithium battery must be replaced with an identical battery or a battery type recommended by the manufacturer (CR2032). [. . . ] Front Side Bus FWH . . . . . . . . . . . . . . . . . . . . . . . . . . . . Firmware Hub GMCH. . . . . . . . . . . . . . . . . . . . . . . . . . Graphics and Memory Controller Hub I2C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Inter Integrated Circuit IAPC . . . . . . . . . . . . . . . . . . . . . . . . . . . . [. . . ]

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