User manual GIGABYTE GA-6CXB7

[. . . ] FCC Compliance Statement: This equipment has been tested and found to comply with limits for a Class B digital device , pursuant to Part 15 of the FCC rules. These limits are designed to provide reasonable protection against harmful interference in residential installations. This equipment generates, uses, and can radiate radio frequency energy, and if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. [. . . ] Note: The Intel ® Chipset (82805AA MTH) support 64Mbit and 128Mbit SDRAMS with the following DRAM Configuration. SDRAM configurations: Technology 64 Mbit Configuration 8M x 8 4M x 16 32M x 4 16M x 8 # of Row Address Bits 12 12 12 12 # of Col Address Bits 9 8 11 10 # of Bank Address Bits 2 2 2 2 Page Size 4KB 2KB 16KB 8KB 64 Mbit 128 Mbit 128 Mbit Install memory in any combination table: Location DIMM1 168-pin SDRAM DIMM Modules Single ­ Sided Note Double ­ Sided Single ­ Sided DIMM2 Double ­ Sided Single ­ Sided DIMM3 Double ­ Sided Total System Memory (Max 1GB) DIMM3 must be empty DIMM2 must be empty ¡¹Supports 32 / 64 / 128 / 256 / 512 MB SDRAM DIMM Modules . At the time this User's Manual was written, 512MB DIMM's are only available as Double-sided registered memory (128MB cells). 50 6CXB7 Series Motherboard The motherboard has Rambus In-line Memory Module (RIMM) sockets. The BIOS will automatically detects memory type and size. To install the memory module, just push it vertically into the RIMM Slot . The RIMM module can only fit in one direction due to the two notch. Install memory in any combination table: RIMM 1 RIMM RIMM CRIMM RIMM 2 CRIMM RIMM RIMM 51 Memory Installation Introduce RIMM (Rambus In-line Memory Module) Direct Rambus Memory Controller Directly support a single Direct Rambus * Channel Y Supports 300&400 / 356&400 MHz Direct Rambus * Channel @ 100/133MHz host bus frequency. Y Maximum memory array size up to 256MB using 64Mb/72Mb, 512MB using 128Mb/144Mb, 1GB using 256Mb/288Mb DRAM technology Supports up to 32 Direct Rambus devices per channel Supports a maximum DRAM address decode space of 4GB Configurable optional ECC operation Y ECC with single bit Error Correction and multiple bit Error Detection Y Single bit errors corrected and written back to memory (auto-scrubbing) Y Parity mode not supported DRAM Interface The MCH supports a single channel of Direct RDRAM memory using RSL technology. 300 and 400MHz Direct RDRAM devices are supported. 64, 128 and 256Mb technology Direct RDRAM devices are supported. A maximum of 32 Direct RDRAM devices (64Mb technology = 256MB max) are supported for a single channel. The following table shows the maximum DRAM array size and the minimum increment size for the various DRAM densities supported for MCH. RDRAM Technology Increments Maximum 64Mb/72Mb 8MB 256MB 128Mb/144Mb 16MB 512MB 256Mb/288Mb 32MB 1GB The MCH provides optional ECC error checking for DRAM data integrity. During DRAM writes ECC is generated on a QWORD (64bit) basis. Partial QWORD writes require a read-modify -write cycle when ECC is enabled. During DRAM reads, the MCH supports detection of single-bit and multiple-bit errors, and will correct single bit errors when correction is enabled. The MCH will automatically scrub single bit errors by writing the corrected value back into DRAM when scrubbing is enabled. ECC can only be enabled when the Direct RDRAMs support the extra two data bits used to store the ECC code. The MCH provides a maximum DRAM address decode space of 4GB. The MCH does not remap APIC memory space in hardware. It is the BIOS or system designers responsibility to limit DRAM population so that adequate PCI, AGP, High BIOS, and APIC memory space can be allocated. 52 6CXB7 Series Motherboard $ Page Index for BIOS Setup The Main Menu Standard CMOS Setup BIOS Features Setup Chipset Features Setup Power Management Setup PNP/ PCI Configuration Load BIOS Defaults Load Setup Defaults Integrated Peripherals Hardware Monitor Setup Supervisor / User Password IDE HDD Auto Detection Save & Exit Setup Exit Without Saving Page P. 55 P. 57 P. 60 P. 62 P. 64 P. 68 P. 70 P. 71 P. 72 P. 76 P. 78 P. 79 P. 80 P. 81 53 BIOS Setup BIOS Setup BIOS Setup is an overview of the BIOS Setup Program. The program that allows users to modify the basic system configuration. This type of information is stored in battery-backed CMOS RAM so that it retains the Setup information when the power is turned off. ENTERING SETUP Power On the computer and press <Del> immediately will allow you to enter Setup. If the message disappears before you respond and you still wish to enter Setup, restart the system to try again by turning it OFF then ON or pressing the "RESET" bottom on the system case. [. . . ] A message "PASSWORD DISABLED" will appear to confirm the password being disabled. Once the password is disabled, the system will boot and you can enter Setup freely. If you select "Always" at "Password Check" in BIOS Features Setup Menu, you will be prompted for the password every time the system is rebooted or any time you try to enter Setup Menu. If you select "Setup" at "Password Check" in BIOS Features Setup Menu, you will be prompted only when you try to enter Setup. 78 6CXB7 Series Motherboard IDE HDD Auto Detection AMIBIOS SETUP ­ STANDARD CMOS SETUP ( C ) 1999 American Megatrends, Inc. [. . . ]