User manual LAVRY DA924

[. . . ] Model DA924 High Resolution Digital to Analog Converter Operation Manual Lavry Engineering, Inc. Box 4602 Rolling Bay, WA 98601 http://www. lavryengineering. com/ email:techsupport@lavryengineering. com Revision 1. 3C December 2, 2009 DA924 Warranty LIMITED WARRANTY Subject to the conditions set forth below, for one year after the original purchase date of the product, Lavry Engineering will repair the product free of charge in the United States in the event of a defect in materials or workmanship. Lavry Engineering may exchange new or rebuilt parts for defective parts. Please call the factory for an RMA number prior to shipment. [. . . ] The unit finds the first active input and converts digital audio to analog sound (if the INPUT SELECT Search Mode is enabled. Please see the Input Signal Selection section). The DA924 determines the incoming sample rate for the selected input and displays the incoming frequency (44. 1, 48, 88. 2 or 96KHz). When all inputs are inactive, the unit steps through the input ports continuously as indicated by the input select lamps (if in Search Mode). Most DAC's contains relays for the purpose of muting the output during turn on (allowing the DAC to settle to proper operating conditions). The DA924 contains no relays, in order to avoid signal degradation associated with relay contacts. The unit minimizes "turn-on spikes" by incorporating very slow tracking power supplies for its output stage, thus disabling the drive capability during turn on. The DA924 turn-on spike may be higher then that found in other DAC's but the sound is not compromised. The spike due to power off is comparable to that found in other DAC's. Polarity Inversion The normal polarity is set to pin 2 "+" or "non-inverted. " To invert, press the POLARITY switch. Signal inversion is indicated by a steadily illuminated INVERT lamp. · · · Inverting while in balanced operation exchanges the polarity of the signals on pin 2 and pin 3 of the XLR connector. Inverting while in unbalanced operation impacts signal polarity on pin 2 of the XLR connector. Inverting while in unbalanced operation impacts signal polarity on the IEC center conductor. 8 DA924 Operation Manual PLL Mode and CrystalLockTM Mode The DA924 features a very low jitter PLL Mode that prevents jitter in the input digital audio signal from degrading DA conversion quality. The PLL mode is recommended for operation of the DA924 with inputs of 88. 2 or 96 kHz. The default setting is PLL mode and is indicated by the Sample Frequency indicator slowly blinking. For additional jitter reduction with inputs of 44. 1 or 48 kHz, select the CrystalLockTM Mode. The CrystalLockTM mode is indicated by the Sample Frequency indicator staying constantly illuminated. To enable CrystalLockTM mode, press and hold the POLARITY button for 1. 5 seconds. The Sample Rate indicator will become steadily illuminated. To return to PLL mode, press and hold the POLARITY button again. This mode setting is retained when power is removed. Power and Fusing The DA924 operates at 50 or 60 Hz, and has two line voltage selections, 115 volts and 230 volts. Voltage selection is made in the power input module on the rear panel. [. . . ] The deglither circuit utilizes DMOS technology thus providing extremely low resistance during the "on" state. The remaining problems due to "on" state resistance variations are neutralized by use of the strong feedback of the deglitcher amplifier. The main reason for using DMOS transistors is their sub nanosecond switching capabilities. The jitter critical timing point is all at the deglitcher circuit. [. . . ]