User manual MAXTOR D540X-4G

[. . . ] # 0 2 JETC / NCWPC/ VEWFQT2 ) :& TQVZC/ © March 5, 2002 Maxtor Corporation. Printed in U. S. A. This publication could include technical inaccuracies or typographical errors. Changes are periodically made to the information herein ­ which will be incorporated in revised editions of the publication. Maxtor may make changes or improvements in the product(s) described in this publication at any time and without notice. [. . . ] A change to expand this method was required to provide more address bits for the interface, allowing significant growth for many years to come. A critical issue in expanding the addressing capability was maintaining compatibility with the existing installed base of products. A new ATA standard, ATA/ATAPI-6, has been in the works for some time, and the latest draft of this standard resolves this issue by increasing the maximum number of bits used for addressing from 28 to 48. This solution increases the maximum capacity of an ATA device to 144 petabytes while maintaining compatibility with current ATA products. !FGVPGOGNRO+ PQKUPGVZ' GJV UK YQ* !FGXNQXP+ UK GUN' VCJ9 # # # # The 48-bit Address feature set provides a method to address devices with capacities up to approximately 144 petabytes by increasing the number of bits used to specify logical block addresses (LBAs) from 28 to 48. The feature set also provides a method to increase the number of sectors that can be transferred by a single command from 256 to 65, 536 by increasing the number of bits specifying sector count to 16 bits. New commands specific to this feature set have been defined so that devices can implement the new feature set in addition to previously defined commands. Devices implementing the 48-bit Address feature set commands will also implement commands that use 28-bit addressing in order to maintain interoperability with older system components. In addition, 8-bit and 48-bit commands may be intermixed. The 48-bit Address feature set operates in LBA addressing only. Support of the 48-bit Address feature set is indicated in the IDENTIFY DEVICE response data. In a device implementing the 48-bit Address feature set, the registers used for addressing are, in fact, a two-byte deep FIFO. Each time one of these registers is written, the new content written is placed into the "most recently written" location and the previous content of the register is moved to "previous content" location. A host may read the "previous content" of the registers by first setting a bit in the Device Control register to 1 and then reading the desired register. The challenge to drive manufacturers is to develop and implement new interface chips on drives that can accept and decode the new 48-bit addressing scheme. Many functions of decoding the commands sent to and from the drive are automated in the silicon of the drive interface ASIC, and this is where drive manufacturers must update their designs. Maxtor is the leader in development efforts and is the first to deliver a product with the capacity and drive technology to deliver greater than 137 gigabytes of capacity. Effort is required from OS vendors to increase storage device addressing up to 48 bits or more. This increase will be a significant challenge for many OS vendors that have 32-bit code models. Adapting to 48-bit commands will be easy, but most vendors will stop filling data at the 32-bit boundary and pad the upper 16 bits with zeros, leaving that space empty. Maxtor D540X-4G A-3 Breaking the 137GB Storage Barrier The BIOS companies will also have to perform some work to recognize the increased capacity of the devices attached to the bus and allow the extended 48-bit commands to pass on to the devices. Boot partitions will also be an issue for the capacity of the drive if the BIOS does not recognize the 48-bit addressing scheme at or before the system boots the OS from the hard drive. Independent software driver efforts for legacy operating systems (Windows NT 4, Windows 98, and so on) will need to be implemented to allow higher-capacity devices to work on installed systems and recognize the maximum available capacity of the drive over the 137-gigabyte limit. · BIOS: (an acronym for Basic Input/Output System design): The BIOS processes and redirects all data as it is being accessed and stored. · FAT: (an acronym for File Allocation Table): The FAT tells the computer where data has been stored on the hard drive. · CHS: (an acronym for Cylinders, Heads, and Sectors): The basic layout components of a hard drive. INT 13h & INT 13h extensions: protocols used for accessing data on hard drives. · 131 kilobytes = 131, 000 bytes a little more than 30 pages of text · 33 megabytes = 33, 000, 000 bytes more than 8, 000 pages of text or 25 300-page books · 137 gigabytes = 137, 000, 000, 000 bytes more than 100, 000 books, or the contents of a good library · 2. 2 terabytes = 2, 200, 000, 000, 000 bytes almost 2, 000, 000 books, or the about content of the Library of Congress · 144 petabytes = 144, 000, 000, 000, 000, 000 bytes 120 billion books ­ (more than all that man has written) · 9. 4 zettabytes = 9, 400, 000, 000, 000, 000, 000, 000 bytes A-4 Maxtor D540X-4G UTGDOW0 IK$ [IQNQPK OT G6 !TGKTTC$ VZG0 GJV UK VCJ9 While it is true that the ATA/ATAPI-6 standard defines a method to provide a total capacity for a device of 144 petabytes, the next limit will be imposed not by the ATA devices but by many of the popular operating systems in use today. [. . . ] The number of tracks or cylinders that are written in each inch of travel across the surface of a disk. TRACK ­ One of the many concentric magnetic circle patterns written on a disk surface as a guide to where to store and read the data. TRACK DENSITY ­ How closely the tracks are packed on a disk surface. The number is specified as tracks per inch (TPI). [. . . ]