User manual OMRON CPM1 PROGRAMING MANUAL 02-2001

[. . . ] W353-E1-06 SYSMAC CPM1/CPM1A/CPM2A/CPM2C/SRM1(-V2) Programmable Controllers PROGRAMMING MANUAL CPM1/CPM1A/CPM2A/CPM2C/SRM1(-V2) Programmable Controllers Programming Manual Revised February 2008 iv Notice: OMRON products are manufactured for use according to proper procedures by a qualified operator and only for the purposes described in this manual. The following conventions are used to indicate and classify precautions in this manual. Always heed the information provided with them. Failure to heed precautions can result in injury to people or damage to property. [. . . ] The above limitations on the number of branching points requiring TR bits, and considerations on methods to reduce the number of programming instructions, still hold. Interlocks The problem of storing execution conditions at branching points can also be handled by using the INTERLOCK (IL(02)) and INTERLOCK CLEAR (ILC(03)) instructions to eliminate the branching point completely while allowing a specific execution condition to control a group of instructions. The INTERLOCK and INTERLOCK CLEAR instructions are always used together. 351 Basic Ladder Diagrams Section 6-3 When an INTERLOCK instruction is placed before a section of a ladder program, the execution condition for the INTERLOCK instruction will control the execution of all instruction up to the next INTERLOCK CLEAR instruction. If the execution condition for the INTERLOCK instruction is OFF, all right-hand instructions through the next INTERLOCK CLEAR instruction will be executed with OFF execution conditions to reset the entire section of the ladder diagram. The effect that this has on particular instructions is described in 7-11 INTERLOCK and INTERLOCK CLEAR ­ IL(02) and ILC(03). Diagram B can also be corrected with an interlock. Here, the conditions leading up to the branching point are placed on an instruction line for the INTERLOCK instruction, all of lines leading from the branching point are written as separate instruction lines, and another instruction line is added for the INTERLOCK CLEAR instruction. No conditions are allowed on the instruction line for INTERLOCK CLEAR. Note that neither INTERLOCK nor INTERLOCK CLEAR requires an operand. 00000 IL(02) 00001 Instruction 1 00002 Instruction 2 Address 00000 00001 00002 00003 00004 00005 00006 Instruction LD IL(02) LD Instruction 1 LD Instruction 2 ILC(03) Operands 00000 --00001 00002 --- ILC(03) If IR 00000 is ON in the revised version of diagram B, above, the status of IR 00001 and that of IR 00002 would determine the execution conditions for instructions 1 and 2, respectively. Because IR 00000 is ON, this would produce the same results as ANDing the status of each of these bits. If IR 00000 is OFF, the INTERLOCK instruction would produce an OFF execution condition for instructions 1 and 2 and then execution would continue with the instruction line following the INTERLOCK CLEAR instruction. As shown in the following diagram, more than one INTERLOCK instruction can be used within one instruction block; each is effective through the next INTERLOCK CLEAR instruction. 00000 IL(02) 00001 Instruction 1 00002 IL(02) 00003 00004 Instruction 2 00005 Instruction 3 00006 Instruction 4 Address 00000 00001 00002 00003 00004 00005 00006 00007 00008 00009 00010 00011 00012 00013 Instruction LD IL(02) LD Instruction 1 LD IL(02) LD AND NOT Instruction 2 LD Instruction 3 LD Instruction 4 ILC(03) Operands 00000 --00001 00002 --00003 00004 00005 00006 --- ILC(03) 352 Basic Ladder Diagrams Section 6-3 If IR 00000 in the above diagram is OFF (i. e. , if the execution condition for the first INTERLOCK instruction is OFF), instructions 1 through 4 would be executed with OFF execution conditions and execution would move to the instruction following the INTERLOCK CLEAR instruction. If IR 00000 is ON, the status of IR 00001 would be loaded as the execution condition for instruction 1 and then the status of IR 00002 would be loaded to form the execution condition for the second INTERLOCK instruction. If IR 00002 is OFF, instructions 2 through 4 will be executed with OFF execution conditions. If IR 00002 is ON, IR 00003, IR 00005, and IR 00006 will determine the first execution condition in new instruction lines. 6-3-9 Jumps A specific section of a program can be skipped according to a designated execution condition. Although this is similar to what happens when the execution condition for an INTERLOCK instruction is OFF, with jumps, the operands for all instructions maintain status. Jumps can therefore be used to control devices that require a sustained output, e. g. , pneumatics and hydraulics, whereas interlocks can be used to control devices that do not required a sustained output, e. g. , electronic instruments. Jumps are created using the JUMP (JMP(04)) and JUMP END (JME(05)) instructions. If the execution condition for a JUMP instruction is ON, the program is executed normally as if the jump did not exist. If the execution condition for the JUMP instruction is OFF, program execution moves immediately to a JUMP END instruction without changing the status of anything between the JUMP and JUMP END instruction. All JUMP and JUMP END instructions are assigned jump numbers ranging between 00 and 99. The jump number used determines the type of jump. A jump can be defined using jump numbers 01 through 99 only once, i. e. , each of these numbers can be used once in a JUMP instruction and once in a JUMP END instruction. [. . . ] Specific changes are as follows: Pages xi, 1, 23, 148, 163, 177, 197, 203, 331, 341, 383, 495, 500, and 546: CPM2C-S added. Pages 7 and 21: Information added on DIP switch changes. Page 161: Information added on startup operation. Page 545: Description of AR 1314 altered. [. . . ]