User manual TEXAS INSTRUMENTS STELLARIS LM3S1150 DATA SHEET REV D

[. . . ] TE X AS INS TRUM E NTS - P RO DUCTI O N D ATA Stellaris® LM3S1150 Microcontroller D ATA SHE E T D S -LM 3S 1150 - 7 3 9 3 C opyri ght © 2007-2010 Texas Instr uments Incor porated Copyright Copyright © 2007-2010 Texas Instruments Incorporated All rights reserved. Stellaris and StellarisWare are registered trademarks of Texas Instruments Incorporated. ARM and Thumb are registered trademarks and Cortex is a trademark of ARM Limited. Other names and brands may be claimed as the property of others. [. . . ] This field is initialized to all 1s and can only be committed once. June 23, 2010 Texas Instruments-Production Data 165 Internal Memory Register 12: User Register 1 (USER_REG1), offset 0x1E4 Note: Offset is relative to System Control base address of 0x400FE000. This register provides 31 bits of user-defined data that is non-volatile and can only be committed once. Bit 31 indicates that the register is available to be committed and is controlled through hardware to ensure that the register is only committed once. Prior to being committed, bits can only be changed from 1 to 0. The reset value shown only applies to power-on reset; any other type of reset does not affect this register. The write-once characteristics of this register are useful for keeping static information like communication addresses that need to be unique per part and would otherwise require an external EEPROM or other non-volatile device. Once committed, this register cannot be restored to the factory default value. User Register 1 (USER_REG1) Base 0x400F. E000 Offset 0x1E4 Type R/W, reset 0xFFFF. FFFF 31 NW Type Reset R/W 1 15 R/W 1 14 R/W 1 13 R/W 1 12 R/W 1 11 R/W 1 10 R/W 1 9 R/W 1 8 DATA Type Reset R/W 1 R/W 1 R/W 1 R/W 1 R/W 1 R/W 1 R/W 1 R/W 1 R/W 1 R/W 1 R/W 1 R/W 1 R/W 1 R/W 1 R/W 1 R/W 1 30 29 28 27 26 25 24 23 DATA R/W 1 7 R/W 1 6 R/W 1 5 R/W 1 4 R/W 1 3 R/W 1 2 R/W 1 1 R/W 1 0 22 21 20 19 18 17 16 Bit/Field 31 Name NW Type R/W Reset 1 Description Not Written When set, this bit indicates that this 32-bit register has not been committed. When clear, this bit specifies that this register has been committed and may not be committed again. 30:0 DATA R/W 0x7FFFFFFF User Data Contains the user data value. This field is initialized to all 1s and can only be committed once. 166 Texas Instruments-Production Data June 23, 2010 Stellaris® LM3S1150 Microcontroller Register 13: Flash Memory Protection Read Enable 1 (FMPRE1), offset 0x204 Note: Offset is relative to System Control base address of 0x400FE000. This register stores the read-only protection bits for each 2-KB flash block (FMPPEn stores the execute-only bits). Flash memory up to a total of 64 KB is controlled by this register. Other FMPREn registers (if any) provide protection for other 64K blocks. This register is loaded during the power-on reset sequence. The factory settings for the FMPREn and FMPPEn registers are a value of 1 for all implemented banks. This achieves a policy of open access and programmability. The register bits may be changed by writing the specific register bit. However, this register is R/W0; the user can only change the protection bit from a 1 to a 0 (and may NOT change a 0 to a 1). The changes are not permanent until the register is committed (saved), at which point the bit change is permanent. If a bit is changed from a 1 to a 0 and not committed, it may be restored by executing a power-on reset sequence. The reset value shown only applies to power-on reset; any other type of reset does not affect this register. If the Flash memory size on the device is less than 64 KB, this register usually reads as zeroes, but software should not rely on these bits to be zero. For additional information, see the "Flash Memory Protection" section. Flash Memory Protection Read Enable 1 (FMPRE1) Base 0x400F. E000 Offset 0x204 Type R/W, reset 0x0000. 0000 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 READ_ENABLE Type Reset R/W 0 15 R/W 0 14 R/W 0 13 R/W 0 12 R/W 0 11 R/W 0 10 R/W 0 9 R/W 0 8 R/W 0 7 R/W 0 6 R/W 0 5 R/W 0 4 R/W 0 3 R/W 0 2 R/W 0 1 R/W 0 0 READ_ENABLE Type Reset R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 Bit/Field 31:0 Name READ_ENABLE Type R/W Reset Description 0x00000000 Flash Read Enable. [. . . ] All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. [. . . ]