User manual TRANSCEND TS2GSDG DATASHEET

[. . . ] TS1G~2GSDG Description Secure Digital Card of high capacity but economic cost. [. . . ] The current consumption of any card during the power-up procedure must not exceed 10 mA. · Bus Signal Line Load The total capacitance CL the CLK line of the SD Memory Card bus is the sum of the bus master capacitance CHOST, the bus capacitance CBUS itself and the capacitance CCARD of each card connected to this line: CL = CHOST + CBUS + *CCARD Where N is the number of connected cards. Requiring the sum of the host and bus capacitances not to exceed 30 pF for up to 10 cards, and 40 pF for up to 30 cards, the following values must not be exceeded: Parameter Bus signal line capacitance Single card capacitance Maximum signal line inductance Pull-up resistance inside card (pin1) Symbol CL CCARD RDAT3 Min. Max. 100 10 16 Unit pF pF nH k Remark fPP 20 MHz, 7 cards fPP 20 MHz May be used for card detection 10 90 Note that the total capacitance of CMD and DAT lines will be consist of CHOST, CBUS and one CCARD only since they are connected separately to the SD Memory Card host. Parameter Pull-up resistance Bus signal line capacitance Symbol RCMD, RDAT CL Min. 10 Max. 100 250 Unit k pF Remark To prevent bus floating fPP 5 MHz, 21 cards Transcend Information Inc. 3 TS1G~2GSDG · Bus Signal Levels Secure Digital Card As the bus can be supplied with a variable supply voltage, all signal levels are related to the supply voltage. To meet the requirements of the JEDEC specification JESD8-1A, the card input and output voltages shall be within the following specified ranges for any VDD of the allowed voltage range: Parameter Output HIGH voltage Output LOW voltage Input HIGH voltage Input LOW voltage Symbol VOH VOL VIH VIL Min. 0. 75* VDD Max. 0. 125* VDD Unit V V V V Remark IOH = -100 A @VDD min IOL = -100 A @VDD min 0. 625* VDD VSS ­ 0. 3 VDD + 0. 3 0. 25* VDD Transcend Information Inc. 4 TS1G~2GSDG · Bus Timing Secure Digital Card Parameter Clock frequency Data Transfer Mode Clock frequency Identification Mode (The low freq. is required for MultiMediaCard compatibility. ) Clock low time Clock high time Clock rise time Symbol fPP fOD Min 0 0 Max. 25 400 Unit MHz KHz Remark CL 100 pF, (7 cards) CL 250 pF, (21 cards) Clock CLK (All values are referred to min (VIH) and max (VIL) tWL tWH tTLH 5 10 50 10 50 10 50 ns ns ns ns ns ns CL 100 pF, (7 cards) CL 250 pF, (21 cards) CL 100 pF, (7 cards) CL 250 pF, (21 cards) CL 100 pF, (7 cards) CL 250 pF, (21 cards) Transcend Information Inc. TS1G~2GSDG Clock fall time Inputs CMD, DAT (referenced to CLK) Input set-up time Input hold time Outputs CMD, DAT (referenced to CLK) Output Delay time tODLY 0 14 ns tISU tIH 5 5 ns ns tTHL 10 50 ns ns Secure Digital Card CL 100 pF, (7 cards) CL 250 pF, (21 cards) CL 25 pF, (1 cards) CL 25 pF, (1 cards) CL 25 pF, (1 cards) Transcend Information Inc. 6 TS1G~2GSDG 5 Reliability and Durability Temperature Operation: -25°C / 85°C Storage: -40°C (168h) / 85°C (500h) Junction temperature: max. 95°C Secure Digital Card Moisture and corrosion Operation: 25°C / 95% rel. hum. /500h Salt Water Spray: 3% NaCl/35C; 24h acc. MIL STD Method 1009 10. 000 mating cycles; test procedure: tbd. [. . . ] Transcend reserves the right to make changes in specifications at any time without prior notice. Transcend Information Inc. 7 [. . . ]