User manual ZILOG Z8FS040 PRODUCT SPECIFICATION REV 1

[. . . ] Z8FS040 ZMOTIONTM Detection and Control Family Featuring ePIRTM Technology Product Specification PS028501-0610 PRELIMINARY Copyright©2010 by Zilog®, All rights reserved. www. zilog. com ZMOTIONTM Detection and Control Family Product Specification Warning: DO NOT USE IN LIFE SUPPORT LIFE SUPPORT POLICY ZILOG'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF ZILOG CORPORATION. As used herein Life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness. Document Disclaimer ©2010 by Zilog, Inc. , All rights reserved. [. . . ] The bit is checked and cleared during the EPIR_ADC_ISR routine. ePIR Engine Entry Points There are two entry points to the ePIR Engine that are accessed through two predefined Macros. One is an initialization Macro that is used to start the Engine and the other is executed upon every ADC interrupt. Both Macro's save and initialize the Register Pointer, perform a Call to the ePIR Engine entry point and then restore the Register Pointer before returning control to the application. It is the responsibility of the Application S/W to execute these Macro's at the appropriate time. EPIR_INIT Macro This macro is executed to initialize the ePIR Engine after reset. It is normally only executed once and is used in conjunction with the ePIR Engine Enable register in the standard API section. The application should initialize all API registers, write the ePIR Enable Pattern to the ePIR Engine Enable register, and then execute this Macro. ADC conversions are started by this macro. EPIR_INIT Macro: PUSHX LDX CALL POPX RP RP, #%E0 %1FFD RP CPU Cycles: 261 Peripherals Initialized: ADC and GPIO depending on API selected options. ADC IRQ set for medium priority. PS028501-0610 Preliminary 17 ZMOTIONTM Detection and Control Family Product Specification EPIR_ADC_ISR Macro This macro is executed for each ADC conversion. The application handles the ADC interrupt and executes this macro. All motion detection processing is performed by this macro. EPIR_ADC_ISR Macro: PUSHX RP LDX RP, #%E0 CALL %1000 POPX RP The CPU cycles used by this Macro vary depending on Engine state and configuration. ePIR Engine CPU Stack Usage The ePIR Engine shares the processor stack with the user application. There are no special requirements on the placement of the stack in memory, but it is essential that the user provide enough stack space for both the user application and the ePIR Engine. The ePIR Engine requires maximum 6 bytes of stack. PS028501-0610 Preliminary 18 ZMOTIONTM Detection and Control Family Product Specification Standard API Register Set The Standard API Register Set is a series of registers implemented in the Z8FS040 RAM that allows the user code to configure and communicate with the ePIR Engine. The default values are loaded only when the ePIR Engine is enabled via the ePIR Enable Register. API Register Name ePIR Engine Enable Register ePIR Sensitivity Register ePIR Status/Control Register 0 ePIR Status/Control Register 1 ePIR Status/Control Register 2 ePIR Status/Control Register 3 ePIR ADC Result Value ePIR Version Address 100h 101h 102h 103h 104h 105h 10Ah/10Bh 10Ch Pneumonic ePIR_Enable ePIR_Sensitivity ePIR_SC0 ePIR_SC1 ePIR_SC2 ePIR_SC3 Description Enable ePIR Engine Motion Sensitivity Motion Status and Engine Mode Control Engine Status and Control Range Control ADC Scan Request ePIR_ADC_Result ADC Scan Result ePIR_Version ePIR Engine S/W Version Table 5 - ePIR Engine Standard API Registers PS028501-0610 Preliminary 19 ZMOTIONTM Detection and Control Family Product Specification ePIR Engine Enable Register (ePIR_Enable) Bit Field Control Address 7 6 5 4 3 ePIR Enable/Disable Pattern Read/Write 100H 2 1 0 ePIR Enable/Disable Pattern (Bits 0-7) ePIR Enable/Disable Register Controlled by Application The ePIR Enable Register controls the overall operation of the ePIR Engine. As an added level of protection, there is a specific 8 bit enable value and 8 bit disable value. Reading this register returns the last value written. Once enabled, the ePIR Engine reads the application controlled Status/Control Register values and sets the Engine controlled values to their default state. To enable the ePIR Engine, first write the ePIR_ENABLE_PATTERN to the ePIR Enable Register then execute the EPIR_INIT macro. Pattern 00h Name ePIR_DISABLE_PATTERN Description Disables all Engine functions, including motion detection. Used to temporarily or permanently shut down the Engine. All primary Engine functions as configured in Engine Status/Control Registers are enabled. Confirmation of enabled status is provided through Engine Disabled bit in Status/Control Register 0. 11h ePIR_ENABLE_PATTERN Table 6 - ePIR S/W Enable Patterns ePIR Sensitivity Register (ePIR_Sensitivity) Bit Field Default Control Address 7 U 6 U 5 U 4 Sensitivity U Read/Write 101H U U U U 3 2 1 0 Sensitivity (Bits 0-7) ePIR Sensitivity Setting Controlled by Application The ePIR Sensitivity Register is used to adjust the sensitivity of the ePIR Engine to target motion. Lower values produce higher sensitivity to motion with 00h being the most sensitive and FFh being the least sensitive. [. . . ] It uses the Flash Frequency Control Registers to determine the operating frequency which must be initialized prior to starting the Engine. The Flash Frequency High (FFREQH) and Flash Frequency Low Byte (FFREQL) registers combine to form a 16-bit value FFREQ primarily to control timing for Flash program and erase functions. This value is also used by the ePIR S/W Engine to calculate the required sample rate of the ADC and other functions. The 16-bit value for FFREQ is the System Clock Frequency in KHz and is calculated using the following equation. FFREQ[15:0] = {FFREQH[7:0], FFREQL[7:0]} = (System Clock Frequency)/1000 Basic steps for initializing the ePIR Engine ­ this process is common to both Normal Scan Rate and Low Scan Rate modes: 1. [. . . ]