User manual BIOSTAR P4M800-M7A BIOS SETUP

[. . . ] P4M800-M7A BIOS SETUP BIOS Setup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1 Main Menu. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Standard CMOS Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Advanced BIOS Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 Advanced Chipset Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . [. . . ] The Choices: Enabled(default), Disabled. INIT DISPLAY FIRST With systems that have multiple video cards, this option determines whether the primary display uses a PCI Slot or an AGP Slot. The Choices: PCI Slot (default), AGP. 17 P4M800-M7A BIOS Manual 5 Integrated Peripherals Figure 5. Integrated Peripherals VIA OnChip IDE Device The chipset contains a PCI IDE interface with support for two IDE channels. Select "Enabled" to activate the first and / or second IDE interface. If you install a primary and / or secondary add-in IDE interface, select "Disabled" to deactivate an interface. If you highlight the literal "Press Enter" next to the "Onchip IDE Control" label and then press the enter key, it will take you a submenu with the following options: 18 P4M800-M7A BIOS Manual OnChip SATA This option allows you to enable the onchip Serial ATA. The Choices: Enabled (default), Disabled. IDE DMA Transfer Access The Choices: Enabled (default), Disabled. IDE Channel 0/1 The motherboard chipset contains a PCI IDE interface with support for two IDE channels. Select "Enabled" to activate the first and/or second IDE interface. Select "Disabled" to deactivate an interface if you are going to install a primary and/or secondary add-in IDE interface. The Choices: Enabled (default), Disabled. IDE Prefetch Mode The "onboard" IDE drive interfaces supports IDE prefetching for faster drive access. If the interface does not support prefetching. If you install a primary and/or secondary add-in IDE interface, set this option to "Disabled". The Choices: Enabled (default), Disabled. IDE Primary / Secondary Master / Slave PIO The IDE PIO (Programmed Input / Output) fields let you set a PIO mode (0-4) for each of the IDE devices that the onboard IDE interface supports. Modes 0 through 4 provides successively increased performance. In Auto mode, the system automatically determines the best mode for each device. The Choices:Auto (default), Mode0, Mode1, Mode2, Mode3, Mode4. IDE Primary / Secondary Master / Slave UDMA Ultra DMA/100 functionality can be implemented if it is supported by the IDE hard drives in your system. As well, your operating environment requires a DMA driver (Windows 95 OSR2 or a third party IDE bus master driver). [. . . ] However, the color information coming from the VGA controller is drawn from the palette table inside the VGA controller to generate the proper colors, and the graphic controller needs to know what is in the palette of the VGA controller. To do this, the non-VGA graphic controller watches for the Write access to the VGA palette and registers the snoop data. In PCI based systems, where the VGA controller is on the PCI bus and a non-VGA graphic controller is on an ISA bus, the Write Access to the palette will not show up on the ISA bus if the PCI VGA controller responds to the Write In this case, the PCI VGA controller should not respond to the Write, it should only snoop the data and permit the access to be forwarded to the ISA bus. The non-VGA ISA graphic controller can then snoop the data on the ISA bus. [. . . ]