User manual CADENCE DESIGN SYSTEMS CADENCE ORCAD PCB DESIGNER EXPLORER SIGNAL INTEGRITY TECHNOLOGY DATASHEET
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Manual abstract: user guide CADENCE DESIGN SYSTEMS CADENCE ORCAD PCB DESIGNER EXPLORER SIGNAL INTEGRITY TECHNOLOGYDATASHEET
Detailed instructions for use are in the User's Guide.
[. . . ] CAD E NCE O r CAD S I G NAL EXP L O r Er S I G N A L I N T E Gr I T Y TEC HNO LO G Y
DATASHEET
Cadence OrCAD signal integrity technology is available in the following products: · OrCAD Signal Explorer
Cadence® OrCAD® Signal Explorer helps engineers address signal integrity issues throughout the design process--from the conceptual schematic through placement and final routing. It enables pre- and post-route topology exploration, signal analysis, and validation, allowing designers to increase circuit reliability and drive known-good interconnect requirements throughout the PCB design flow.
Increasing design density, complexity, and faster edge rates create a multitude of signal integrity issues, which can lead to time-consuming and frustrating simulatefix-simulate iterations and increased production costs. [. . . ] The oscilloscope mode allows the display of individual waveforms on and off, and provides markers for on-screen measurement. The logic analyzer mode presents waveforms alongside one another, so logic behavior and bus transactions are easier to observe. The spectrum analyzer mode displays signal behavior in the frequency domain using one of several FFT techniques. The eyediagram mode is useful for viewing patterns in long simulation sequences. SigWave also allows import of waveform data directly from various standard test equipment formats as well as from the output formats of popular signal integrity analysis tools.
for more complex devices. This flexible macromodeling extension language augments IBIS and allows state-of-the-art I/O functionality to be modeled quickly and accurately.
SPICE-BASED SIMULATION ENVIRONMENT
The Tlsim simulation engine combines the advantages of traditional SPICE-based structural modeling with the speed of behavioral analysis. It includes an IBIS-style behavioral driver element that models I/O behavior based on the V-I and V-T data provided by behavioral modeling techniques.
BENEFITS
· Enablespre-andpost-layoutsignalintegrity analysis at any stage of the design cycle, ensuring constraint adherence · Allowsexploration, analysis, anddesign of interconnect topologies to increase circuit reliability, improve circuit performance, and reduce prototype re-spins · Eliminatestheneedtotranslatedesign databases to run simulations by importing extracted topologies directly from OrCAD PCB Editor · Providesaneasy-to-usemodelediting environment that creates, manipulates, and validates a variety of models, quickly improving model/simulation performance
Figure 3: Users can change topologies or stack-up information and perform quick, iterative tradeoffs
FEATURES
SIGXPLORER MODULE
OrCAD Signal Explorer provides an electrical view of the physical interconnect and a simulation cockpit for analysis of critical high-speed signals. Users can explore a net before schematics are created by using the SigXplorer module in a standalone mode. SigXplorer provides various stripline and microstrip modelslossy or losslessto get started with the exploration. Since OrCAD Signal Explorer integrates seamlessly with OrCAD PCB Editor, users can extract a net in the pre-route or post-route stage right into SigXplorer. Users can then quickly analyze the signal using SPICE-based simulation.
Figure 2: View and analyze simulation results in SigWave
MODEL INTEGRITY
The Model Integrity module provides an editing environment within OrCAD Signal Explorer that allows the creation, manipulation, and validation of models quickly and easily. This module includes a model browser and syntax checker for models written in IBIS as well as for advanced models written in DML. [. . . ] Cadence and OrCAD are registered trademarks and the Cadence logo is a trademark of Cadence Design Systems, Inc. All others are properties of their respective holders. [. . . ]
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