User manual CADENCE DESIGN SYSTEMS INCISIVE ENTERPRISE PALLADIUM SERIES WITH INCISIVE XE SOFTWARE DATASHEET

[. . . ] INCI S I V E E N T E R P R I S E PA L L A D I U M SERI E S W I T H I N C I S I V E X E SOFT WA R E DATASHEET The Cadence Incisive Palladium series consists of three generations of products: Palladium, Palladium II, and Palladium III. They deliver unrivaled speed and support a multi-specialist team approach. With one investment, you get multiple runtime modes along with local and remote access availability for multi-user, multi-project support. The Incisive® Enterprise Palladium® series of accelerators/ emulators is a key component of the Incisive functional verification platform. It provides the performance needed to verify embedded software and HW/SW interactions. [. . . ] · Verification IP for in-circuit emulation SpeedBridge® rate adapters provide an interface to testers and real-world systems. SpeedBridge adapters connect emulated designs to environments running at 10s of MHz. The following SpeedBridge adapters are available today: ­ ­ ­ ­ ­ ­ PCI/PCIX SpeedBridge PCI Express SpeedBridge Audio/Video SpeedBridge Multi-Ethernet SpeedBridge SAS/SATA SpeedBridge USB SpeedBridge ­ Xilinx Virtex-II FPGA for prototyping discrete logic outside the emulator ­ Generic pin-grid array for usermounting of any discrete components · Transaction-based acceleration Transaction-based acceleration (TBA) is an acceleration mode that supports a transaction-oriented testbench modeling style. TBA uses message-level communication between the SystemC testbench components running on the workstation and the rest of the environment running on the Palladium system. By using message-level communication rather than signal-level communication, TBA reduces the amount of communication and thereby increases overall acceleration performance. Unique productivity features, including support for variable length messages, faster streaming mode, and transaction recording, are available with Palladium TBA. Incisive XE software supports a timed modeling style of testbench components in addition to an untimed modeling style. The Incisive Enterprise Simulator has also been optimized to provide high-speed, low-latency communication with the Palladium system, further increasing performance. ­ Congruent TBA: allows users to create a transaction-based environment without using the hardware. Using only the Incisive Enterprise Simulator, engineers can fully develop their models, optimizing environment bringup time. Once the models are fully functional, engineers then migrate painlessly to hardware, where these same models will run unchanged at up to 100x faster than standard simulation. With congruent TBA, results are guaranteed to be the same, regardless of which engine (Incisive or Palladium) is used for execution ­ Concurrent TBA: allows users to achieve near-emulation performance with designs being driven from a testbench. With this mode, the design runs continuously (free running) at full emulation speed, while the testbench is running on the workstation. This exclusive feature is ideal for running large regression suites, where maximum performance is essential Figure 5: Palladium series IP chassis · TBA VIP The Palladium series supports a suite of industry-standard transactors such as PCI Express, Ethernet, AMBATM AHB, and AXI. · ABA VIP The Palladium series supports a suite of industry-standard protocol monitors built from assertions including USB, Ethernet, AMBA AHB, and AXI. MULTIPLE USE MODELS FOR MAXIMUM VALUE · Signal-based acceleration Signal-based acceleration with Palladium systems delivers up to 1, 000x performance over simulation and is a natural first step when the need for verification performance increases. The synthesizable RTL and memory models are moved into the accelerator where they run several orders of magnitude faster than on the workstation. Behavioral testbench code continues to run on the workstation. Because performance can be limited by the behavioral code running on the workstation, the Palladium system utilizes a unique signal-guided synchronization algorithm that reduces the communication between the workstation and the accelerator. The Palladium system's Incisive XE compiler also synthesizes many behavioral statements, which further improves performance. These technologies greatly increase performance compared with earlier acceleration technologies. Figure 4: Universal SpeedBridge chassis · IP blocks Palladium systems support hard IP with standard IP blocks through the Palladium IP chassis. Each standard IP block is 100x175mm in size and can have up to 1, 248 bi-directional signal pins. Cadence supplies a number of turnkey IP blocks including: ­ ARM® Logic Tiles: ARM programmable processor models with connection support to off-the-shelf ARM software debuggers www. cadence. com INCISIVE ENTERPRISE PALLADIUM SERIES WITH INCISIVE XE SOFTWARE 5 · SCE-MI­based and SystemVerilogDPI interfaces The Palladium series SCE-MI­based interface supports C, C++, and SystemC languages, and it allows testbenches written in these languages to drive the Palladium system directly. [. . . ] c a d e n ce. com SPECIFICATIONS TWO CONFIGURATIONS Palladium systems come in two configurations. Fully licensed systems come with all physical capacity already enabled. License-expandable systems come with physical capacity that is partially enabled. Additional domains of capacity can be enabled with "always-on" licenses. [. . . ]