User manual CADENCE DESIGN SYSTEMS INCISIVE PALLADIUM III DYNAMIC POWER ANALYSIS DATASHEET
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Manual abstract: user guide CADENCE DESIGN SYSTEMS INCISIVE PALLADIUM III DYNAMIC POWER ANALYSISDATASHEET
Detailed instructions for use are in the User's Guide.
[. . . ] DATASHEET
SYSTEM-LEVEL DYNAMIC POWER ANALYSIS
Palladium Dynamic Power Analysis offers "What-if" analysis of power consumption based on logic switching activities, with respect to different architecture variations, design implementations, or application scenarios. [. . . ] Additionally, Palladium Dynamic Power Analysis delivers offline power calculation by capturing the necessary power activities in a common DPA power database. This capability further enables the sharing of verification resources while DPA is computing the power profile offline.
· Enables relative compare of IP at RTL phase Identify architectural issues Enables hardware/software architectural trade-offs · Reduces risk and packaging cost Adequately select package Avoid re-spins/lost opportunities
· Data processing: Ability to process data in various ways such as toggle count, high count, time average and peak values · Filtering: Interval Average: This filter will split raw data into intervals of the same size. (Helps reduce the number of windows) Running Average: This filter calculates an average number for the selected window. (Helps with a smoother waveform) · Supports the Common Power Format (CPF) Allows user to specify advanced power reduction techniques such as power shutofff · Leverages SimVision for comprehensive analysis Histogram and filtered data can be viewed along with instance and signals
FEATURES
· Peak identification Identifies top N (numbers of) peaks. Each peak is identified by an instance name and time · Average power calculation Calculates realistic average power based on long simulation runs · Supports both RTL and gate-level power estimation RTL based power estimation can be used for relative IP comparison Gate-level power estimation can be used for more accurate analysis · Weighted toggle count Weights can be assigned to scale the power consumptions in different elements to the toggle activities. For example, embedded memories consume more power than standard cells for the same number of I/O transitions. Therefore, memories get assigned a higher weight compared to standard cells. This enables more realistic representation of a dynamic power profile. [. . . ] All others are properties of their holders. [. . . ]
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