User manual GIGABYTE GA-7PTSH

[. . . ] 1001 Dual LGA2011 sockets motherboard for Intel® E5-2600 series processors Copyright © 2013 GIGA-BYTE TECHNOLOGY CO. , LTD. The trademarks mentioned in this manual are legally registered to their respective owners. Disclaimer Information in this manual is protected by copyright laws and is the property of GIGABYTE. Changes to the specifications and features in this manual may be made by GIGABYTE without prior notice. No part of this manual may be reproduced, copied, translated, transmitted, or published in any form or by any means without GIGABYTE's prior written permission. Documentation Classifications In order to assist in the use of this product, GIGABYTE provides the following types of documentations:  For detailed product information, carefully read the User's Manual. For product-related information, check on our website at: http://www. gigabyte. com Table of Contents Box Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 GA-7PTSH Motherboard Layout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Chapter 1 Hardware Installation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1-1 1-2 1-3 1-4 Installation Precautions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . [. . . ] When enabled, cache lines are fetched in pairs. When disabled, only the required cache line is fetched. Enable prefetch of next L1 Data line based upon multiple loads in same cache line. Enable prefetch of next L1 Data line based upon sequential load history. Select whether to enable the Intel Virtualization Technology function. VT allows a single platform to run multiple operating systems in independent partitions. Default setting is Disabled. Execute Disable Bit Hardware Prefetcher Adjacent Cache Line Prefetch DCU Streamer Prefetch DCU IP Prefetch Intel Virtualization Technology PPIN Support CPU Power Management Configuration Press [Enter] for configuration of advanced items. BIOS Setup - 42 - 2-2-3-1 CPU Power Management Configuration CPU Power Management Configuration Power Technology EIST (Enhanced Intel SpeedStep Technology) Configure the power management features. Options available: Disable/Energy Efficient/Custom. Conventional Intel SpeedStep Technology switches both voltage and frequency in tandem between high and low levels in response to processor load. When this item is enabled, tje processor will automatically ramp up the clock speed of 1-2 of its processing cores to improve its performance. When this item is disabled, the processor will not overclock any of its core. In HW_ALL mode, the processor hardware is responsible for coordinating the P-state among logical processors dependencies. The OS is responsible for keeping the P-state request up to date on all logical processors. In SW_ALL mode, the OS Power Manager is responsible for coordinating the P-state among logical processors with dependencies and must initiate the transition on all of those Logical Processors. In SW_ANY mode, the OS Power Manager is responsible for coordinating the P-state among logical processors with dependencies and may initiate the transition on any of those Logical Processors. Options available: HW_ALL/SW_ALL/SW_ANY. Default setting is HW_ALL. Turbo Mode P-STATE Coordination - 43 - BIOS Setup CPU C3/C6 Report (Note) Allows you to determine whether to let the CPU enter C3/C6 mode in system halt state. When enabled, the CPU core frequency and voltage will be reduced during system halt state to decrease power consumption. The C3/C6 state is a more enhanced power-saving state than C1. Configure state for the C-State package limit. Options available: C0/C1/C6/C7/No Limit. Energy Performance Bias is Intel CPU function. [. . . ] Determines which devices system will boot to. Options available: UEFI and Legacy/Legacy only/UEFI only. Determines which devices system will boot to. Options available: UEFI only/Legacy only. [. . . ]