User manual GIGABYTE GS-R12P4G

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Manual abstract: user guide GIGABYTE GS-R12P4G

Detailed instructions for use are in the User's Guide.

[. . . ] No part of this manual may be reproduced, copied, translated, transmitted, or published in any form or by any means without GIGABYTE's prior written permission. Documentation Classifications In order to assist in the use of this product, GIGABYTE provides the following types of documentations:  For detailed product information, carefully read the Serice Guide. For product-related information, check on our website at: http://www. gigabyte. com Preface Before using this information and the product it supports, please read the following general information. 1. This Service Guide provides you with all technical information relating to the BASIC CONFIGURATION decided for GIGABYTE’s “global” product offering. To better fit local marketrequirements and enhance product competitiveness, your regional office MAY have decided toextend the functionality of a machine (e. g. add-on card, modem, or extra memory capability). These LOCALIZED FEATURES will NOT be covered in this generic service guide. [. . . ] Enable/Disable onboard LAN devices and initialize device expansion ROM. Default setting is Disabled. Onboard LAN1/2 Controller Onboard LAN I/O ROM Option Onboard LAN1/2 I/O ROM PCI 64bit Resources Handling Above 4G Decoding PCI Common Settings PCI Latency Timer Enable/Disable Above 4G Decoding. Default setting is Disabled. Configure PCI Latency Timer. Options available: 32 PCI Bus Clocks/64 PCI Bus Clocks/96 PCI Bus Clocks/128 PCI Bus Clocks/160 PCI Bus Clocks/192 PCI Bus Clocks/224 PCI Bus Clocks/248 PCI Bus Clocks. - 40 - BIOS Setup VGA Platte Snoop Enable/Disable VGA Palette Tegisters Snooping. When this item is set to enabled, PCI bus parity error (PERR) is generated and is routed to NMI. When this item is set to enabled, PCI bus system error (SERR) is generated and is routed to NMI. Press [Enter] for configuration of advanced items. PERR Generation SERR Generation PCI Express Settings - 41 - BIOS Setup 5-2-1-1 PCI Express Settings PCI Express Device Register Settings Relaxed Ordering Enable/DIsable PCI Express Device Relaxed Ordering feature. Wnen this feature is enabled, the system will allow device to use 8-bit Tag field as a requester. Enable/Disable PCI Express Device No Snoop option. Set maximum playlooad for PCI Express Device or allow system BIOS to select the value. BIOS Setup - 46 - Limit CPUID Maximum When enabled, the processor will limit the maximum COUID input values to 03h when queried, even if the processor suppports a higher CPUID input value. When disabled, the processor will return the actual maximum CPUID input value of the processor when queried. When enabled, the processor prevents the execution of code in data-only memory pages. This provides some protection against buffer overflow attacks. When disabled, the processor will not restrict code execution in any memory area. This makes the processor more vulnerable to buffer overflow attacks. Select whether to enable the speculative prefetch unit of the processor. When enabled, cache lines are fetched in pairs. When disabled, only the required cache line is fetched. Enable prefetch of next L1 Data line based upon multiple loads in same cache line. Enable prefetch of next L1 Data line based upon sequential load history. [. . . ] Default setting is Immediate. Option ROM Messages INT19 Endless Retry INT19 Trap Response - 83 - BIOS Setup 5-6-2 CSM Parameters CSM parameters Press Enter to configure the advanced items. Launch CSM (Compatibility Support Module) Enable/Disable Compatibility Support Module (CSM) launch. • The following five items appears and configurable when the Launch CSM is set to Enabled. • If the Launch CSM is set to Disabled, the following five items will not be able to support Legacy mode. [. . . ]

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