User manual INTEL P31 EXPRESS CHIPSET SPECIFICATION UPDATE

[. . . ] EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined. " Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. [. . . ] 11 Documentation Changes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Specification Update 3 3 Series Chipsets--Revision History Revision History Revision Description · · · Date -001 -002 -003 Initial Release Added Errata #2 Added B0 stepping details July 2007 August 2007 February 2008 §§ 4 Specification Update Preface Preface This document is an update to the specifications contained in the Affected Documents/ Related Documents table below. This document is a compilation of device and documentation errata, specification clarifications and changes. It is intended for hardware system manufacturers and software developers of applications, operating systems, or tools. Information types defined in Nomenclature are consolidated into the specification update and are no longer published in other documents. This document may also contain information that was not previously published. Affected Documents/Related Documents Title Intel ® Number 317495-001 G31/P31 Express Chipset Datasheet Nomenclature Errata are design defects or errors. These may cause the Intel 82G31/82P31 (G)MCH behavior to deviate from published specifications. Hardware and software designed to be used with any given stepping must assume that all errata documented for that stepping are present on all devices. Specification Changes are modifications to the current published specifications. These changes will be incorporated in any new release of the specification. Specification Clarifications describe a specification in greater detail or further highlight a specification's impact to a complex design situation. These clarifications will be incorporated in any new release of the specification. Documentation Changes include typos, errors, or omissions from the current published specifications. These will be incorporated in any new release of the specification. Note: Errata remain in the specification update throughout the product's lifecycle or until a particular stepping is no longer commercially available. Under these circumstances, errata removed from the specification update are archived and available upon request. Specification changes, specification clarifications and documentation changes are removed from the specification update when the appropriate changes are made to the appropriate product specification or user documentation (datasheets, manuals, etc. ). Specification Update 5 Summary Tables of Changes Summary Tables of Changes The following tables indicate the errata, specification changes, specification clarifications, or documentation changes which apply to the Intel 82G31/82P31 (G)MCH product. Intel may fix some of the errata in a future stepping of the component, and account for the other outstanding issues through documentation or specification changes as noted. [. . . ] Revision Number corresponds to bits 7:0 of the Revision ID register located at offset 08h in the PCI function 0 configuration space. Component Marking Information The Intel® G31/P31 Express Chipsets may be identified by the following register content. Stepping A2 A2 B0 B0 Product GMCH GMCH GMCH GMCH S-Spec # SLAJ3 SLAHX SLASJ SLASK Top Marking LE82G31 LE82P31 LE82G31 LE82P31 Intel® Notes G31 Express Chipset Production Sample Intel® P31 Express Chipset Production Sample Intel® G31 Express Chipset Production Sample Intel® P31 Express Chipset Production Sample 8 Specification Update Errata Errata 1. Problem: Graphics Debug Reset If the Graphics Reset Enable (PCI Bus 0 Device 2 Function 0; offset C0h, bit 0) is set and there are new cursor, display, or overlay engine commands, the internal graphics may not be able to complete its reset. Since the internal graphics may not be able to be reset, the system may hang or have video corruption. Implication: Workaround: Disable the cursor, display, and overlay engines. Issue the graphics reset by setting this bit to 1. The Intel® Graphics Media Accelerator driver implements this workaround. [. . . ]