User manual MAXTOR ST31276A

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Manual abstract: user guide MAXTOR ST31276A

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[. . . ] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Medalist Family: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ST31276A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ST31082A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ST3636A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . [. . . ] The Error bit (ERR) is set in the Status register and the Error register is updated. The value in the Error register should be viewed as a unique 8-bit code and not as the single-bit flags defined previously. The interface registers are set to initial values except for the Error register. The table below details the codes in the Error register and a corresponding explanation: Error Code: 01 hex 02 hex 03 hex 8x hex Description: No error detected Format device error Sector buffer error Slave drive failed Additional codes may be implemented at the manufacturer's option. Note: If the slave drive fails diagnostics, the master drive shall "OR" 80 hex with its own status and load that code into the Error register. If the slave drive passes diagnostics or there is no slave drive connected, the master drive shall set bit 7 of the Error register in the Task File to 0. Format Track Command Number: 50 hex This command is not supported on the drive. The implementation of this command has become vendor specific due to the complexities of address translation and is not required for ATA compliance. Page 48 ST3636A/ST31082A/ST31276A Command Set Chapter 7 Identify Device Command Number: EC hex Description: This command allows the host to receive parameter information from the drive. When the command is issued, the drive sets BSY, stores the required parameter information in the sector buffer, sets the DRQ bit, and generates an interrupt. The host may then read the information out of the sector buffer. The parameter words in the buffer are arranged as follows. All reserved bits or words should be zeroes. All numbers are given in hexadecimal format, rightjustified. Word (hex): 0 1 2 3 4 5 6 7 8 9 10-19 20 21 22 23-26 27-46 47 Description: General configuration bit significant information (0C5A) Default number of logical cylinders Reserved Default number of logical heads Vendor specific (Obsolete) Vendor specific (Obsolete) Default Number of logical sectors per logical track Vendor specific (Obsolete) Vendor specific (Obsolete) Vendor specific (Obsolete) Serial number right justification Vendor specific (Obsolete) Vendor specific (Obsolete) Number of ECC bytes on R/W long commands Controller firmware revision Model number Number of sectors per interrupt on Multiple commands: bits 15-8: 80 hex · bits 7-0: 00 hex means Read/Write multiple not implemented; xx hex is the maximum number of sectors that can be transferred per multiple command · 48 Reserved Technical Reference Manual Page 49 Chapter 7 Command Set Word (hex): 49 Description: Capabilities definitions bits 15-14 0 = (reserved) bit 13 1 = Standby timer as specified in ATA bit 12 0 = (reserved) bit 11 1 = IORDY supported bit 10 1 = IORDY can be disabled bit 9 1 = LBA supported bits 8 1 = DMA supported bits 7-1 0 = (vendor specific) bits 0 1 = assign alternate supported (vendor specific) Reserved bits 15-8 bits 7-0 PIO data transfer cycle timing mode (w/o IORDY) Vendor specific = DMA data transfer timing mode Vendor specific Reserved 1 = the fields reported in words 64-70 are valid 0 = the fields reported in words 64-70 are not valid bit 0 1 = the fields reported in words 54-58 are valid 0 = the fields reported in words 54-58 are not valid 50 51 52 bits 15-8 bits 7-0 53 bits 15-2 bit 1 54 55 56 57 58 59 Number of current logical cylinders Number of current logical heads Number of current sectors per logical track LSW Current capacity in sectors MSW Current capacity in sectors bits bit bits 15-9 8 7-0 Reserved 1 = Multiple sector setting is valid xx = current setting for number of sectors per transfer on R/W Multiple commands 60 61 62 LSW Total number of user addressable sectors (LBA mode only) MSW Total number of user addressable sectors (LBA mode only) bits 15-8 bits 7-0 Vendor specific (Obsolete) Vendor specific (Obsolete) Page 50 ST3636A/ST31082A/ST31276A Command Set Chapter 7 Word (hex): 63 Description: bits 15-8 bits 7-3 bit 2 bit bit 1 0 01 hex = Multiword DMA transfer mode active reserved for future Multiword DMA transfer modes** 1 = Multiword DMA transfer Mode 2 supported 0 = Multiword DMA transfer Mode 2 NOT supported 1 = Multiword DMA transfer Mode 1 supported 0 = Multiword DMA transfer Mode 1 NOT supported 1 = Multiword DMA transfer Mode 0 supported 0 = Multiword DMA transfer Mode 0 NOT supported Reserved reserved for future Advanced PIO Modes*** 1 = PIO Mode 4 supported 0 = PIO Mode 4 not supported 1 = PIO Mode 3 supported 0 = PIO Mode 3 not supported 64 bits 15-8 bits 7-2 bit 1 bit 0 65 66 67 68 69-79 80 Minimum multiword DMA transfer cycle time per word (ns) Recommended multiword DMA transfer cycle time (ns) Minimum PIO transfer cycle time without flow control (ns) Minimum PIO transfer cycle time with IORDY flow control (ns) Reserved Major Version number (0000H or FFFFH= device does not report version) bits 15 bits 14-6 bit 5 bit 4 bit 3 bit 2 bit 1 0 = (reserved) 0 = (reserved for future ATA specifications) 0 = (reserved for ATA-5) 1 = supports ATA-4 1 = supports ATA-3 1 = supports ATA-2 1 = supports ATA-1 81 Minor version number FFFFH 000AH-FFFEH 0009H 0008H 0007H 0006H 0005H 0004H 0003H 0002H 0001H 0000H device does not support version (reserved) ATA-2 X3T10 948D revision 3 ATA-2 X3T10 2008D revision 0 ATA-2 X3T10 948D revision 2k ATA-3 X3T10 2008D revision 1 ATA-2 X3T10 948D prior to revision 2k (reserved) ATA-1 X3T9. 2 781D prior to revision 4 (reserved) ATA-1 X3T9. 2 781D prior to revision 4 device does not support version Technical Reference Manual Page 51 Chapter 7 Command Set Word (hex): 82 Description: Command set supported. If words 82 and 83 =0000H or FFFFH command set notification not supported. bits bit bit bit bit 4-15 3 2 1 0 0 = (reserved) 1 = support power management feature set 1 = support removable feature set 1 = support security feature set 1 = support SMART feature set 83 Command sets supported. If word 82 and 83 =0000H or FFFFH command set notification not supported. bit bit bit 15 0 = must be cleared to 0 14 1 = must be set to 1 13-0 0 = (reserved) 84-127 128 129-159 160-255 Reserved Security Status - Not implemented Vendor specific Reserved * PIO Timing Parameters Cycle Time ** Multiword DMA Timing Cycle Time *** Advanced PIO Timing Cycle Time Mode 0 (nsec) 600 Mode 0 (nsec) 480 Mode 1 (nsec) 383 Mode 1 (nsec) >= 150 Mode 2 (nsec) 240 Mode 2 (nsec) >= 120 Mode 3 (nsec) >= 180 Mode 4 (nsec) >= 120 Page 52 ST3636A/ST31082A/ST31276A Command Set Chapter 7 Initialize Device Parameters Command Number: 91 hex Description: This command enables the host to set the head switch and cylinder increment points for multiple sector operations. The drive calculates the number of available logical cylinders based upon the total number of available blocks and the values contained in the Sector Count and Drive/Head registers. The sector and head values in the Task File are not checked for validity by this command. If they are invalid, no error will be reported until an illegal access is made by some other command. Cylinder head increments on subsequent commands will occur after access of the maximum sector and maximum head specified by this command. Upon receipt of the command, the drive sets BSY, saves the parameters, resets BSY, and generates an interrupt. Seagate has established a Universal Translate Mode which enables you to configure the drive in an AT environment to any cylinder, head, and sector configuration desired (refer to chapter 3). Technical Reference Manual Page 53 Chapter 7 Command Set Power Commands Command Number: Ex hex Description: The Power commands are supported on some Seagate drives, including the ST3636A, ST31082A and ST31276A. If a Power command is issued to a drive that does not support the Power commands, an Abort status will be returned to the host in the Error register. [. . . ] Device selection - A device is selected when the DEV bit of the Drive/Head register is equal to the device number assigned to the device by means of a Device 0/Device 1 jumper or switch, or use of the CSEL signal. DMA (Direct memory access) - A means of data transfer between device and host memory without host processor intervention. Head, physical - A transducer which translates the fluctuations in the magnetic orientation of the recording layer of the disk into electrical signals that can be decoded into bits of data. Head, logical - A mapping of sectors on the disk drive into an imaginary surface of a disk for purposes of achieving compatibility with legacy addressing schemes. 9 Technical Reference Manual Page 79 Chapter 9 Glossary LBA (Logical block address) - This term defines the addressing of the device as being by the linear mapping of sectors. [. . . ]

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