User manual MAXTOR ST9100A

[. . . ] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ST9100A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AT Interface Drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Product Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ST9100A AT Interface Drive Product Manual 36211-001, Rev. A 27 April 1993 © 1993 Seagate Technology, Inc. [. . . ] Error codes (LED Flashes) 1 2 3 5 6 Error type Microprocessor error ROM checksum error AT interface chip failure External RAM error Buffer RAM error 3. 3 AT bus signal levels Signals driven by the drive must have the following output characteristics at the drive connector: Logic Low Logic High 0. 0V to 0. 4V 2. 5V to 5. 25V Signals received by the drive must have the following input characteristics, measured at the drive connector: Logic Low Logic High 0. 0V to 0. 8V 2. 0V to 5. 25V 3. 4 AT interface connector The drive connector is a 44-conductor connector with 2 rows of 22 male pins on 0. 079 inch (2 mm) centers (see Figure 4 on page 16). The mating-cable connector is a 44-conductor nonshielded connector with 2 rows of 22 female contacts on 0. 079 inch (2 mm) centers. It is recommended that the connectors be keyed by inserting a plug into the pin 20 location of each interface connector. Use MCC-compatible connectors, such as Molex part number 87368442x, for fixed-mounting applications. For applications involving flexible cables or printed circuit cables (PCCs), use Molex part number 872594413 or equivalent to connect the system to the drive. Select a connector that provides adequate clearance for the master/slave configuration 16 ST9100A Product Manual, Rev. A jumpers (if the application requires the use of such jumpers). See Figure 4 for details. 3. 5 AT interface cable Maximum cable length is 18 inches (457 mm). It is recommended that the connectors be keyed by the use of a plug in the pin 20 location of each interface connector. 0. 079 ± 0. 003 0. 020 ± 0. 002 sq. drive circuit board Do not scale 0. 079 ± 0. 003 44 signal/power pins (22 rows) 1. 654 Configuration jumpers (2 rows) 0. 158 ± 0. 003 0. 152 ± 0. 005 Note. Tolerances are noncumulative over entire range Figure 4. AT interface connector dimensions ST9100A Product Manual, Rev. A 17 3. 6 AT interface connector pin assignments The following diagram summarizes the signal pin assignments for the ST9100A AT interface connector. Drive pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Signal name Reset­ Ground DD7 DD8 DD6 DD9 DD5 DD10 DD4 DD11 DD3 DD12 DD2 DD13 DD1 DD14 DD0 DD15 Ground (removed) Reserved Ground DIOW­ Ground DIOR­ Ground Reserved Reserved Reserved Ground INTRQ IOCS16­ DA1 PDIAG­ DA0 DA2 CS1FX­ CS3FX­ DASP­ Ground Power Power Ground Reserved Host pin # and signal description 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Host Reset Ground Host Data Bus Bit 7 Host Data Bus Bit 8 Host Data Bus Bit 6 Host Data Bus Bit 9 Host Data Bus Bit 5 Host Data Bus Bit 10 Host Data Bus Bit 4 Host Data Bus Bit 11 Host Data Bus Bit 3 Host Data Bus Bit 12 Host Data Bus Bit 2 Host Data Bus Bit 13 Host Data Bus Bit 1 Host Data Bus Bit 14 Host Data Bus Bit 0 Host Data Bus Bit 15 Ground (No Pin) Reserved Ground Host I/O Write Ground Host I/O Read Ground Reserved Reserved Reserved Ground Host Interrupt Request Host 16 Bit I/O Host Address Bus Bit 1 Passed Diagnostics Host Address Bus Bit 0 Host Address Bus Bit 2 Host Chip Select 0 Host Chip Select 1 Drive Active / Slave Present Ground +5V (logic) +5V (motor) Ground for power pins Reserved 18 ST9100A Product Manual, Rev. A 3. 7 AT interface commands for the ST9100A The following commands are specific to the ST9100A. For a description of any AT interface commands not found in this manual and Seagate's implementation of the AT interface, refer to the Seagate ATA Interface Specification, publication number 36111-001. For maximum compatibility, there may be more than one opcode for some commands. In such instances, all opcodes perform in an equivalent manner and are treated identically by the drive. In all of the following tables, D/S designates the drive select bit and an "X" designates that the register is not used for the particular command. Notations for special register functions are listed in the command table and explained in the command descriptions. 3. 7. 1 Standby Immediate (E0H / 94H) When the drive receives this command, it enters Standby mode immediately. The drive sets BSY, initiates a shutdown sequence, enters Standby mode, clears BSY, and generates an interrupt. If the drive is already in Standby mode when this command is received, it sets BSY, clears BSY and generates an interrupt. (1F2H) 1 0 1 D/S X X Bit 7 1 Bit 6 1 Bit 5 1 Bit 4 0 X X X Bit 3 0 Bit 2 0 Bit 1 0 Bit 0 0 ST9100A Product Manual, Rev. [. . . ] After the Rest command is issued, the host should wait up to 10 seconds for the drive to assert INTRQ. When the drive receives a Rest command, it captures the state of the I/O registers as they existed upon completion of the previous command, then enters Rest mode. After entering Rest mode, the drive rejects any command other than a Read Drive State command with an aborted command error. The Rest mode can only be cleared by power off or reset. [. . . ]