User manual MSI G52-75211X5 V2.0

[. . . ] G45M Digital Series MS-7521 (V2. X) Mainboard G52-75211X5 i Copyright Notice T he material in this doc ument is the intellec tual property of M ICRO-STAR INTERNATIONAL. We take every care in the preparation of this document, but no guarantee is given as to the correctness of its contents. Our products are under continual improvement and we reserve the right to make changes without notice. Trademarks All trademarks are the properties of their respective owners. NVIDIA, the NVIDIA logo, DualNet, and nForce are registered trademarks or trademarks of NVIDIA Corporation in the United States and/or other countries. [. . . ] JAUD1 2 1 10 9 HD Audio Pin Definition PIN 1 2 3 4 5 6 7 8 9 10 SIGNAL MIC_L GND MIC_R NC LINE out_R MIC_JD Front_JD NC LINE out_L LINEout_JD DESCRIPTION Microphone - Left channel Ground Microphone - Right channel Analog Port - Right channel Jack detection return from front panel microphone JACK1 Jack detection sense line from the High Definition Audio CODEC jack detection resistor network No control Analog Port - Left channel Jack detection return from front panel JACK2 TPM Module Connector: JTPM1 (optinoal) This connector connects to a TPM (Trusted Platform Module) module (optional). Please refer to the TPM security platform manual for more details and usages. 2 1 Pin 1 3 5 7 9 11 13 Signal LCLK LRST# LAD0 LAD1 LAD2 LAD3 LFRAME# Description LPC clock LPC reset LPC address & data pin0 LPC address & data pin1 LPC address & data pin2 LPC address & data pin3 LPC Frame Pin 2 4 6 8 10 12 14 Signal 3V_STB VCC3 SIRQ VCC5 KEY GND GND Description 3V standby power 3. 3V power Serial IRQ 5V power No pin Ground Ground En-19 M S-7521 M ainboard Front USB Connector: JUSB1~3 These connectors, compliant with Intel® I/O Connectivity Design Guide, is ideal for connecting high-speed USB interface peripherals such as USB HDD, digital cameras, M P3 players, printers, modems and the like. Pin Definition PIN 1 2 1 10 9 3 5 7 9 SIGNAL VCC USB0USB0+ GND Key (no pin) PIN 2 4 6 8 10 SIGNAL VCC USB1USB1+ GND NC JUSB1~3 USB 2. 0 Bracket (optional) Important Note that the pins of VCC and GND must be connected correctly to avoid possible damage. En-20 Jumper Clear CMOS Jumper: JBAT1 There is a CMOS RAM onboard that has a power supply from an external battery to keep the data of system configuration. W ith the CMOS RAM, the system can automatically boot OS every time it is turned on. If you want to clear the system configuration, set the jumper to clear data. English 1 3 1 3 JBAT1 1 Keep Data Clear Data Important You can clear CMOS by shorting 2-3 pin while the system is off. Avoid clearing the CMOS while the system is on; it will damage the mainboard. En-21 M S-7521 M ainboard Slots PCI (Peripheral Component Interconnect) Express Slot The PCI Express slot supports the PCI Express interface expansion card. The PCI Express x16 slot supports up to 8. 0 GB/s transfer rate. The PCI Express x1 slot supports up to 250 MB/s transfer rate. PCI Express x16 Slot PCI Express x1 Slot PCI (Peripheral Component Interconnect) Slot The PCI slot supports LAN card, SCSI card, USB card, and other add-on cards that comply with PCI specifications. 32-bit PCI Slot Important When adding or removing expansion cards, make sure that you unplug the power supply first. Meanwhile, read the documentation for the expansion card to configure any necessary hardware or software settings for the expansion card, such as jumpers, switches or BIOS configuration. PCI Interrupt Request Routing The IRQ, acronym of interrupt request line and pronounced I-R-Q, are hardware lines over which devices can send interrupt signals to the microprocessor. The PCI IRQ pins are typically connected to the PCI bus pins as follows: Order 1 PCI Slot 1 PCI Slot 2 INT F# INT A# Order 2 INT G# INT B# Order 3 INT H# INT C# Order 4 INT E# INT D# En-22 LED Status Indicators English LED1, LED2, LED3, LED4 Blue Light Off M o de CPU is in 1 phase power mode. CPU is in 4 phase power mode. LED1 LED2 LED3 LED4 En-23 M S-7521 M ainboard BIOS Setup This chapter provides basic information on the BIOS Setup program and allows you to configure the system for optimum use. You may need to run the Setup program when: * An error message appears on the screen during the system booting up, and requests you to run BIOS SETUP. * You want to change the default settings for customized features. Important 1. The items under each BIOS category described in this chapter are under continuous update for better system performance. Therefore, the description may be slightly different from the latest BIOS and should be held for reference only. 2. Upon boot-up, the 1st line appearing after the memory count is the BIOS version. It is usually in the format: A7521IMS V2. 0 091508 where: 1st digit refers to BIOS maker as A = AMI, W = AWARD, and P = PHOENIX. 2nd - 5th digit refers to the model number. 6th refers to the Chipset vender as A = AMD, I = Intel, V = VIA, N = Nvidia, U = ULi. 7th - 8th digit refers to the customer as MS = all standard customers. 091508 refers to the date this BIOS was released. En-24 Press DEL to enter SETUP If the message disappears before you respond and you still wish to enter Setup, restart the system by turning it OFF and On or pressing the RESET button. You may also restart the system by simultaneously pressing <Ctrl>, <Alt>, and <Delete> keys. Getting Help After entering the Setup menu, the first menu you will see is the Main Menu. M ain M enu The main menu lists the setup functions you can make changes to. [. . . ] BIOS : A7521IMS V2. 0 091508 . . . . . . . . . . . A AMI® ; W AWARD ® ; P PHOENIX® ~ . . . . . . . . . A AMD ; I Intel ; V VIA ; N NVIDIA ; U ULi ~ . . . . . . . . . BIOS Tc-24 P O S T ( ) < D E L > Press DEL to enter SETUP RESET <Ctrl><Alt> <Delete> B I O S ( ) < E n t e r > < E s c > <F1> B I O S < F 1 > < E s c > Tc-25 MS-7521 AMI ® AWA RD ® BIOS CMOS < E n t e r > Standard CMOS Features CMOS Advanced BIOS Features BIOS A M I ® Integra te d Pe riphe ra ls Powe r Ma nage me nt Se tup H/W Monitor BIOS Setting Password BIOS B I O S GreenPower Cell Menu Load Fail-Safe Defaults B I O S Loa d Optimiz ed De fa ults Sa ve & Exit Se tup C M O S Exit Without Sa ving Tc-26 B I O S 1 . [. . . ]