User manual SUPERMICRO SUPER 370DER

[. . . ] SUPER SUPER 370DE6 SUPER 370DER SUPER 370DEI ® USER'S MANUAL Revision 2. 0 The information in this User's Manual has been carefully reviewed and is believed to be accurate. The vendor assumes no responsibility for any inaccuracies that may be contained in this document, makes no commitment to update or to keep current the information in this manual, or to notify any person or organization of the updates. Please Note: For the most up-to-date version of this manual, please see our web site at www. supermicro. com. SUPERMICRO COMPUTER reserves the right to make changes to the product described in this manual at any time and without notice. This product, including software, if any, and documentation may not, in whole or in part, be copied, photocopied, reproduced, translated or reduced to any medium or machine without prior written consent. IN NO EVENT WILL SUPERMICRO COMPUTER BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. [. . . ] Advanced BIOS Setup options are displayed by highlighting the option using the arrow keys. All Advanced BIOS Setup options are described in this section. BIOS SETUP UTILITY Main Advanced Chipset PCIPnP Power Boot Security Exit Setup Warning Setting items on this screen to incorrect values may cause the system to malfunction!> > > > > > > SuperIO Configuration IDE Configuration Floppy Configuration Boot Settings Configuration Event Log Configuration Peripheral Device Configuration System Health Monitor Configure SuperIO Chipset Winbond627F BIOS Select Screen Select Item Enter Go to Sub Screen F1 General Help F10 Save and Exit ESC Exit V02. 03 (C)Copyright 1985-2000, American Megatrends, Inc. Use the Up/Down arrow keys to select the "Super I/O Configuration line. When the "Super IO Configuration" line is highlighted, hit "ENTER" to display its menu. The following Super IO Configuration screen will appear. Here you can select your options for the your computer's I/O (Input/Output) devices. 4-4 Chapter 4: BIOS Super IO Configuration BIOS SETUP UTILITY Advanced Configure Nat317Serial Port(s)and Parallel P Serial Port1 Address Serial Port1 IRQ Serial Port2 Address Serial Port2 IRQ Parallel Port Address Parallel Port IRQ Parallel Port Mode ECP Mode DMA Channel [3F8] [4] [2F8] [3] [378] [7] [ECP] [3] Select Screen Select Item +- Change Option F1 General Help F10 Save and Exit ESC Exit V02. 03 (C)Copyright 1985-2000, American Megatrends, Inc. The Super IO Configuration includes the following items: Serial Port 1 Address This option specifies the base I/O port address of serial port 1. The settings for this item include Disabled, 3F8 and 3E8 and 2E8. Select the desired setting and then press "Enter". Serial Port 1 IRQ This option specifies the Interrupt Request address of serial port 1. settings for this item include Disabled, 4 and 3. Serial Port 2 Address This option specifies the base I/O port address of serial port 2. The settings for this item include Disabled, 2F8, 3E8 and 2E8. Serial Port 2 IRQ This option specifies the Interrupt Request address of serial port 2. settings for this item include Disabled, 4 and 3. The The BIOS 4-5 SUPER 370DE6/370DER/370DEI User's Manual Parallel Port Address (370DE6/370DER/370DER+/370DEI/370DEI+) This option specifies the I/O address used by the parallel port. The settings for this item include Disabled, 378, 278 and 3BC. Select your setting and then press "Enter". Parallel Port IRQ (370DE6/370DER/370DER+/370DEI/370DEI+) This option allows the user to set the Parallel Port IRQ. The settings for this item include 5 and 7. Parallel Port Mode (370DE6/370DER/370DER+/370DEI/370DEI+) This option specifies the parallel port mode. The settings for this item include Normal, Bi-directional, EPP and ECP. ECP Mode DMA Channel (370DE6/370DER/370DER+/370DEI/370DEI+) This option allows the user to set the setting for the ECP Mode of the DMA Channel. [. . . ] Setting the keyboard typematic rate next. Programming the memory wait states next. A5h Memory wait state programming is over. Clearing the screen and enabling parity and the NMI next. [. . . ]