User manual TEXAS INSTRUMENTS TMS320C5504 DATASHEET 08-2010

[. . . ] TMS320C5504 www. ti. com SPRS659B ­ AUGUST 2010 ­ REVISED AUGUST 2010 TMS320C5504 Fixed-Point Digital Signal Processor Check for Samples: TMS320C5504 1 Fixed-Point Digital Signal Processor 1. 1 12 Features ­ Software-Compatible With C55x Devices ­ Industrial Temperature Devices Available 256K Bytes Zero-Wait State On-Chip RAM, Composed of: ­ 64K Bytes of Dual-Access RAM (DARAM), 8 Blocks of 4K x 16-Bit ­ 192K Bytes of Single-Access RAM (SARAM), 24 Blocks of 4K x 16-Bit 128K Bytes of Zero Wait-State On-Chip ROM (4 Blocks of 16K x 16-Bit) 4M x 16-Bit Maximum Addressable External Memory Space (SDRAM/mSDRAM) 16-/8-Bit External Memory Interface (EMIF) with Glueless Interface to: ­ 8-/16-Bit NAND Flash, 1- and 4-Bit ECC ­ 8-/16-Bit NOR Flash ­ Asynchronous Static RAM (SRAM) ­ 16-bit SDRAM/mSDRAM (1. 8-, 2. 5-, 2. 75-, and 3. 3-V) Direct Memory Access (DMA) Controller ­ Four DMA With 4 Channels Each (16-Channels Total) Three 32-Bit General-Purpose Timers ­ One Selectable as a Watchdog and/or GP Two MultiMedia Card/Secure Digital (MMC/SD) Interfaces Universal Asynchronous Receiver/Transmitter (UART) Serial-Port Interface (SPI) With Four Chip-Selects Master/Slave Inter-Integrated Circuit (I2C BusTM) Four Inter-IC Sound (I2S BusTM) for Data Transport · HIGHLIGHTS: · High-Perf/Low-Power, C55xTM Fixed-Point DSP ­ 16. 67/13. 33/10/8. 33/6. 66-ns Instruction Cycle Time ­ 60-, 75-, 100-, 120-, 150-MHz Clock Rate · 256K Bytes On-Chip RAM · 16-/8-Bit External Memory Interface (EMIF) · Two MultiMedia Card/Secure Digital I/Fs · Serial-Port I/F (SPI) With Four Chip-Selects · Four Inter-IC Sound (I2S BusTM) · USB 2. 0 Full- and High-Speed Device · Real-Time Clock (RTC) With Crystal Input · Four Core Isolated Power Supply Domains · Four I/O Isolated Power Supply Domains · One Integrated LDO · Industrial Temperature Devices Available · 1. 05-V Core, 1. 8/2. 5/2. 75/3. 3-V I/Os · 1. 3-V Core, 1. 8/2. 5/2. 75/3. 3-V I/Os · 1. 4-V Core, 1. 8/2. 5/2. 75/3. 3-V I/Os · FEATURES: · High-Performance, Low-Power, TMS320C55xTM Fixed-Point Digital Signal Processor ­ 16. 67-, 13. 33-, 10-, 8. 33-, 6. 66-ns Instruction Cycle Time ­ 60-, 75-, 100-, 120-, 150-MHz Clock Rate ­ One/Two Instruction(s) Executed per Cycle ­ Dual Multipliers [Up to 200, 240, or 300 Million Multiply-Accumulates per Second (MMACS)] ­ Two Arithmetic/Logic Units (ALUs) ­ Three Internal Data/Operand Read Buses and Two Internal Data/Operand Write Buses · · · · · · · · · · · 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. Copyright © 2010, Texas Instruments Incorporated UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. TMS320C5504 SPRS659B ­ AUGUST 2010 ­ REVISED AUGUST 2010 www. ti. com · Device USB Port With Integrated 2. 0 High-Speed PHY that Supports: ­ USB 2. 0 Full- and High-Speed Device · Real-Time Clock (RTC) With Crystal Input, With Separate Clock Domain, Separate Power Supply · Four Core Isolated Power Supply Domains: Analog, RTC, CPU and Peripherals, and USB · Four I/O Isolated Power Supply Domains: RTC I/O, EMIF I/O, USB PHY, and DVDDIO · One integrated LDO (ANA_LDO) to power DSP PLL (VDDA_PLL) · Low-Power S/W Programmable Phase-Locked Loop (PLL) Clock Generator · On-Chip ROM Bootloader (RBL) to Boot From NAND Flash, NOR Flash, SPI EEPROM, SPI Serial Flash or I2C EEPROM · IEEE-1149. 1 (JTAGTM) Boundary-Scan-Compatible · Up to 26 General-Purpose I/O (GPIO) Pins (Multiplexed With Other Device Functions) · 196-Terminal Pb-Free Plastic BGA (Ball Grid Array) (ZCH Suffix) · 1. 05-V Core (60 or 75 MHz), 1. 8-V, 2. 5-V, 2. 75-V, or 3. 3-V I/Os · 1. 3-V Core (100, 120 MHz), 1. 8-V, 2. 5-V, 2. 75-V, or 3. 3-V I/Os · 1. 4-V Core (150 MHz), 1. 8-V, 2. 5-V, 2. 75-V or 3. 3-V I/Os · Applications: ­ Wireless Audio Devices (e. g. , Headsets, Microphones, Speakerphones, etc. ) ­ Echo Cancellation Headphones ­ Portable Medical Devices ­ Voice Applications ­ Industrial Controls ­ Fingerprint Biometrics ­ Software Defined Radio · Community Resources ­ TI E2E Community ­ TI Embedded Processors Wiki 2 Fixed-Point Digital Signal Processor Submit Documentation Feedback Product Folder Link(s): TMS320C5504 Copyright © 2010, Texas Instruments Incorporated TMS320C5504 www. ti. com SPRS659B ­ AUGUST 2010 ­ REVISED AUGUST 2010 1. 2 Description The device is a member of TI's TMS320C5000TM fixed-point Digital Signal Processor (DSP) product family and is designed for low-power applications. [. . . ] (c) Set Register Configuration, if present in boot image. Test for NAND boot on all asynchronous CS spaces (EM_CS[2:5]) with 8-bit access: (a) Check the first 2 bytes read from boot table for a boot signature match. (b) If the boot signature is not valid, go to step 9. (c) Set Register Configuration, if present in boot image. Test for 16-bit and 24-bit SPI EEPROM boot on SPI_CS[0] with 500-KHz clock rate and for Parallel Port Mode on External bus Selection Register set to 5, then set to 6: (a) Check the first 2 bytes read from boot table for a boot signature match using 16-bit address mode. (b) If the boot signature is not valid, read the first 2 bytes again using 24-bit address mode. (c) If the boot signature is not valid from either case (16-bit and 24-bit address modes), go to step 10. (d) Set Register Configuration, if present in boot image. (e) Attempt SPI Serial Memory boot, go to step 15. Test for I2C EEPROM boot with a 7-bit slave address 0x50 and 400-kHz clock rate. (a) Check the first 2 bytes read from boot table for a boot signature match. (b) If the boot signature is not valid, go to step 11. (c) Set Register Configuration, if present in boot image. (d) Attempt I2C EEPROM boot, go to step 15. Test for MMC/SD boot -- For more information on MMC/SD boot, contact your local sales representative. Set the PLL output to approximately 36 MHz. If CLK_SEL = 1, CLKIN multiplied by 3x, ; if CLK_SEL = 0, CLKIN is multiplied by 1125x. Test for USB boot -- For more information on USB boot, contact your local sales representative. 46 Device Configuration Submit Documentation Feedback Product Folder Link(s): TMS320C5504 Copyright © 2010, Texas Instruments Incorporated TMS320C5504 www. ti. com SPRS659B ­ AUGUST 2010 ­ REVISED AUGUST 2010 14. If the boot signature is not valid, then go back to step 14 and repeat. Ensure a minimum of 200 ms has elapsed since step 15 before proceeding to execute the bootloaded code. Jump to the entry point specified in the boot image. CLK SEL = 1 ?Yes Internal Configuration No Setup PLL to x375 NOR Boot ? [. . . ] All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. [. . . ]