User manual TEXAS INSTRUMENTS TVP5146M2 DATA MANUAL 11-2010

[. . . ] TVP5146M2 NTSC/PAL/SECAM 4×10-Bit Digital Video Decoder With MacrovisionTM Detection, YPbPr Inputs, 5-Line Comb Filter, and SCART Support Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Literature Number: SLES141F July 2005 ­ Revised November 2010 TVP5146M2 SLES141F ­ JULY 2005 ­ REVISED NOVEMBER 2010 www. ti. com Contents 1 2 3 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 1. 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . [. . . ] This is transmitted as an ancillary data block, although somewhat differently from the way the sliced VBI data is transmitted in the FIFO format as described in Section 2. 7. 1. The samples are transmitted during the active portion of the line. VBI raw data uses ITU-R BT. 656 format having only luma data. The chroma samples are replaced by luma samples. The TVP5146M2 decoder inserts a four-byte preamble 000h 3FFh 3FFh 180h before data start. There are no checksum bytes and fill bytes in this mode. 0 1 2 3 4 5 n-1 n D9 (MSB) 0 1 1 0 D8 0 1 1 1 D7 0 1 1 1 D6 0 1 1 0 D5 0 1 1 0 D4 0 1 1 0 D3 0 1 1 0 D2 0 1 1 0 D1 0 1 1 0 D0 (LSB) 0 1 1 0 DESCRIPTION VBI raw data preamble 1. Data 2× pixel rate luma data (i. e. , NTSC 601: n = 1707) 2. 8 Reset and Initialization Reset is initiated at power up or any time terminal 34 (RESETB) is brought low. Table 2-9 describes the status of the TVP5146M2 terminals during and immediately after reset. Reset Sequence SIGNAL NAME DURING RESET Input Input Input Output RESET COMPLETED High impedance Input Output High impedance Y_[9:0], C_[9:0]/GPIO RESETB, PWDN, SDA, SCL, FSS/GPIO, AVID/GPIO, GLCO/I2CA, HS/CS/GPIO, VS/VBLK/GPIO, FID INTREQ DATACLK 36 Functional Description Submit Documentation Feedback Product Folder Link(s): TVP5146M2 Copyright © 2005­2010, Texas Instruments Incorporated TVP5146M2 www. ti. com SLES141F ­ JULY 2005 ­ REVISED NOVEMBER 2010 TI recommends the following power-up sequence. Power (1. 8 V) 100 s Power (3. 3 V) RESETB (Terminal 34) 3 ms (min) Reset 1 ms (min) Normal Operation SDA (Terminal 29) Invalid I 2C Cycle Valid NOTE: All times shown are minimum values. Maximum time between 1. 8 V and 3. 3 V should be no longer than 1 second. Figure 2-20. Reset Timing The following register writes must be made before normal operation of the device. STEP 1 2 I2C SUBADDRESS 0x03 0x03 I2C DATA 0x01 0x00 When using the TVP5146M2I over the industrial (-40°C to 85°C) temperature range, the following register writes are required following device power up and RESETB to write 0x14 to VBUS register 0xA00014. This setup is optional when using the TVP5146M2 over the commercial (0°C to 70°C) temperature range. STEP 1 2 3 4 I2C SUBADDRESS 0xE8 0xE9 0xEA 0xE0 I2C DATA 0x14 0x00 0xA0 0x14 2. 9 Adjusting External Syncs The proper sequence to program the following external syncs is: · To set NTSC, PAL-M, NTSC 443, PAL60 (525-line modes): ­ Set the video standard to NTSC (register 02h). ­ Set HSYNC, VSYNC, VBLK, and AVID external syncs (registers 16h through 24h). · To set PAL, PAL-N, SECAM (625-line modes): ­ Set the video standard to PAL (register 02h). ­ Set HSYNC, VSYNC, VBLK, and AVID external syncs (registers 16h through 24h). · For autoswitch, set the video standard to autoswitch (register 02h). Copyright © 2005­2010, Texas Instruments Incorporated Functional Description Submit Documentation Feedback Product Folder Link(s): TVP5146M2 37 TVP5146M2 SLES141F ­ JULY 2005 ­ REVISED NOVEMBER 2010 www. ti. com 2. 10 Internal Control Registers The TVP5146M2 decoder is initialized and controlled by a set of internal registers that define the operating parameters of the entire device. Communication between the external controller and the TVP5146M2 is through a standard I2C host port interface, as previously described. Table 2-10 shows the summary of these registers. Detailed programming information for each register is described in the following sections. Additional registers are accessible through an indirect procedure involving access to an internal 24-bit address wide VBUS. Table 2-11 shows the summary of the VBUS registers. [. . . ] All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. [. . . ]