User manual TRANSCEND TS4GCFX500 DATASHEET

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Manual abstract: user guide TRANSCEND TS4GCFX500DATASHEET

Detailed instructions for use are in the User's Guide.

[. . . ] TS2G~16GCFX500 Description Transcend CFast cards are designed to satisfy high performance requirements using a SATA 3Gb/s interface. As a removable device, it is easier to plug and remove in space-limited applications; such as CFast Card Features · · · · · · · · RoHS compliant CFast Specification Version 1. 0 Compliant Power Supply: 3. 3V±5% Operating Temperature: 0oC to 70oC Storage Temperature: -40oC to 85oC Humidity (Non condensation): 0% to 95% Built-in 8-bit/512Byte ECC (Error Correction Code) functionality ensures highly reliable of data transfer. Global wear-leveling algorithm eliminate excessive write operation and extends product life. · Suppot StaticDataRefresh & EarlyRetirement technology to monitor error bit level and react before data is corrupted. thin-clients or industrial PCs. [. . . ] Following calibration the device sends a six burst COMWAKE sequence and then sends a continuous stream of the ALIGN sequence starting at the device's highest supported speed. After ALIGNP Dwords have been sent for 54. 6 us (2048 nominal Gen1 Dword times) without a response from the host as determined by detection of ALIGNP primitives received from the host, the device assumes that the host cannot communicate at that speed. If additional speeds are available the device tries the next lower supported speed by sending ALIGNP Dwords at that rate for 54. 6 us (2048 nominal Gen1 Transcend Information Inc. 11 V0. 5 TS2G~16GCFX500 reached without response from the host, the device enters an error state. CFast Card Dword times. ) This step is repeated for as many slower speeds as are supported. Host locks ­ after detecting the COMWAKE, the host starts transmitting D10. 2 characters at its lowest supported rate. Meanwhile, the host receiver locks to the ALIGN sequence and, when ready, returns the ALIGN sequence to the device at the same speed as received. A host shall be designed such that it acquires lock in 54. 6 us (2048 nominal Gen1 Dword times) at any given speed. The host should allow for at least 873. 8 us (32768 nominal Gen1 Dword times) after detecting the release of COMWAKE to receive the first ALIGNP. This ensures interoperability with multi-generational and synchronous designs. If no ALIGNP is received within 873. 8 us (32768 nominal Gen1 Dword times) the host restarts the power-on sequence ­ repeating indefinitely until told to stop by the Application layer. Device locks ­ the device locks to the ALIGN sequence and, when ready, sends SYNCP indicating it is ready to start normal operation. Host locks ­ after detecting the COMWAKE, the host starts transmitting D10. 2 characters at its lowest supported rate. Meanwhile, the host receiver locks to the ALIGN sequence and, when ready, returns the ALIGN sequence to the device at the same speed as received. A host shall be designed such that it acquires lock in 54. 6 us (2048 nominal Gen1 Dword times) at any given speed. The host should allow for at least 873. 8 us (32768 nominal Gen1 Dword times) after detecting the release of COMWAKE to receive the first ALIGNP. This insures interoperability with multi-generational and synchronous designs. If no ALIGNP is received within 873. 8 us (32768 nominal Gen1 Dword times) the host restarts the power-on sequence ­ repeating indefinitely until told to stop by the Application layer. Device locks ­ the device locks to the ALIGN sequence and, when ready, sends the SYNCP primitive indicating it is ready to start normal operation. Upon receipt of three back-to-back non-ALIGNP primitives, the communication link is established and normal operation may begin. Transcend Information Inc. 13 V0. 5 TS2G~16GCFX500 ATA command register This table with the following paragraphs summarizes the ATA command set. Support ATA/ATAPI Command General Feature Set EXECUTE DIAGNOSTICS FLUSH CACHE IDENTIFY DEVICE READ DMA READ MULTIPLE READ SECTOR(S) READ VERIFY SECTOR(S) SET FEATURES SET MULTIPLE MODE WRITE DMA WRITE MULTIPLE WRITE SECTOR(S) NOP READ BUFFER WRITE BUFFER 90h E7h ECh C8h C4h 20h 40h or 41h EFh C6h CAh C5h 30h 00h E4h E8h E5h or 98h E3h or 97h E1h or 95h E6h or 99h E2h or 96h E0h or 94h F1h F2h F3h F4h F5h F6h B0h B0h B0h B0h B0h B0h F8h F9h F9h F9h F9h F9h CFast Card Code Protocol Device diagnostic Non-data PIO data-In DMA PIO data-In PIO data-In Non-data Non-data Non-data DMA PIO data-out PIO data-out Non-data PIO data-In PIO data-out Non-data Non-data Non-data Non-data Non-data Non-data PIO data-out PIO data-out Non-data PIO data-out Non-data PIO data-out Non-data Non-data Non-data Non-data Non-data PIO data-In Non-data Non-data PIO data-out Non-data Non-data PIO data-out Power Management Feature Set CHECK POWER MODE IDLE IDLE IMMEDIATE SLEEP STANDBY STANDBY IMMEDIATE Security Mode Feature Set SECURITY SET PASSWORD SECURITY UNLOCK SECURITY ERASE PREPARE SECURITY ERASE UNIT SECURITY FREEZE LOCK SECURITY DISABLE PASSWORD SMART Feature Set SMART Disable Operations SMART Enable/Disable Autosave SMART Enable Operations SMART Return Status SMART Execute Off-Line Immediate SMART Read Data Host Protected Area Feature Set Read Native Max Address Set Max Address Set Max Set Password Set Max Lock Set Max Freeze Lock Set Max Unlock Transcend Information Inc. 14 V0. 5 TS2G~16GCFX500 ATA Command Specifications FLUSH CACHE (E7h) CFast Card This command is used by the host to request the device to flush the write cache. If there is data in the write cache, that data shall be written to the media. The BSY bit shall remain set to one until all data has been successfully written or an error occurs. IDENTIFY DEVICE (ECh) This commands read out 512Bytes of drive parameter information. Parameter Information consists of the arrangement and value as shown in the following table. [. . . ] If the SECURITY FREEZE LOCK command is issued when the drive is placed in Frozen mode, the drive executes the command, staying in Frozen mode. SMART Feature Set Transcend IDE SSD supports the SMART command set and define some vendor-specific data to report spare/bad block numbers in each memory management unit. Individual SMART commands are identified by the value placed in the Feature register. Table shows these Feature register values. Value Command D0h SMART READ DATA D2h SMART ENABLE/DISABLE ATTRIBUTE AUTOSAVE D4h SMART EXECUTE OFF-LINE IMMEDIATE D8h SMART ENABLE OPERATIONS D9h SMART DISABLE OPERATIONS DAh SMART RETURN STATUS SMART DISABLE OPERATIONS B0h with a Feature register value of D9h. Disables the SMART function. [. . . ]

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