Detailed instructions for use are in the User's Guide.
[. . . ] Host should consider total bus capacitance for each signal as the sum of CHOST, CBUS, and CCARD, these parameters are defined by per signal. The host can determine CHOST and CBUS so that total bus capacitance is less than the card estimated capacitance load (CL=40 pF). The SD Memory Card guarantees its bus timing when total bus capacitance is less than maximum value of CL (40 pF).
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· Bus Signal Levels
4G~8G Industrial High Capacity Secure Digital Card
As the bus can be supplied with a variable supply voltage, all signal levels are related to the supply voltage.
To meet the requirements of the JEDEC specification JESD8-1A and JESD8-7, the card input and output voltages shall be within the following specified ranges for any VDD of the allowed voltage range:
Parameter
Output HIGH voltage Output LOW voltage Input HIGH voltage Input LOW voltage
Symbol
VOH VOL VIH VIL
Min.
0. 75* VDD
Max.
0. 125* VDD
Unit
V V V V
Remark
IOH = -100 µA @VDD min IOL = -100 µA @VDD min
0. 625* VDD VSS 0. 3
VDD + 0. 3 0. 25* VDD
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· Bus Timing
4G~8G Industrial High Capacity Secure Digital Card
Parameter
Clock frequency Data Transfer Mode Clock frequency Identification Mode Clock low time Clock high time Clock rise time Clock fall time Inputs CMD, DAT (referenced to CLK) Input set-up time Input hold time
Symbol
fPP fOD tWL tWH tTLH tTHL tISU tIH 6
Min
0 0(1)/100 10 10
Max.
25 400
Unit
MHz KHz ns ns
Remark
CCARD 10 pF, (1 card) CCARD 10 pF, (1 card) CCARD 10 pF, (1 card) CCARD 10 pF, (1 card) CCARD 10 pF, (1 card) CCARD 10 pF, (1 card) CCARD 10 pF, (1 card) CCARD 10 pF, (1 card)
Clock CLK (All values are referred to min (VIH) and max (VIL)
10 10 5 5
ns ns ns ns
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Outputs CMD, DAT (referenced to CLK) Output Delay time during Data Transfer Mode tODLY
4G~8G Industrial High Capacity Secure Digital Card
0
14
ns
CL 40 pF, (1 card)
Output Delay time during Identification Mode tODLY 0 50 ns CL 40 pF, (1 card) (1) 0 Hz means to stop the clock. The given minimum frequency range is for cases were continues clock is required
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· Bus Timing (High Speed Mode)
4G~8G Industrial High Capacity Secure Digital Card
Parameter
Clock frequency Data Transfer Mode Clock low time Clock high time Clock rise time Clock fall time Inputs CMD, DAT (referenced to CLK) Input set-up time Input hold time Outputs CMD, DAT (referenced to CLK)
Symbol
fPP tWL tWH tTLH tTHL tISU tIH
Min
0 7 7
Max.
50
Unit
MHz ns ns
Remark
CCARD 10 pF, (1 card) CCARD 10 pF, (1 card) CCARD 10 pF, (1 card) CCARD 10 pF, (1 card) CCARD 10 pF, (1 card) CCARD 10 pF, (1 card) CCARD 10 pF, (1 card)
Clock CLK (All values are referred to min (VIH) and max (VIL)
3 3 6 2
ns ns ns ns
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Output Delay time during Data Transfer Mode Output Hold time
1
4G~8G Industrial High Capacity Secure Digital Card
tODLY tOH 2. 5
14 40
ns ns pF
CL 40 pF, (1 card) CL 40 pF, (1 card) (1 card)
Total System capacitance for each line CL 1) In order to satisfy severe timing, host shall drive only one card.
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Reliability and Durability
Temperature
4G~8G Industrial High Capacity Secure Digital Card
Operation: -40° / 85° C C Storage: -40° (168h) / 85° (500h) C C Junction temperature: max. [. . . ] As an example, the binary value of the Date field for production date "April 2001" will be: 00000001 0100.
· CRC
CRC7 checksum (7 bits).
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3. CSD Register
4G~8G Industrial High Capacity Secure Digital Card
The CSD Regsiter shows Definition of the CSD for the High Capacity SD Memory Card and Extended Capacity SD Memory Card (CSD Version 2. 0). The following sections describe the CSD fields and the relevant data types for the High Capacity SD Memory Card. CSD Version 2. 0 is applied to SDHC and SDXC Cards. If not explicitly defined otherwise, all bit strings are interpreted as binary coded numbers starting with the left bit first.
· CSD_STRUCTURE
Field structures of the CSD register are different depend on the Physical Specification Version and Card Capacity. The CSD_STRUCTURE field in the CSD register indicates its structure version. The following table shows the version number of the related CSD structure.
CSD_STRUCTURE 0 1 2-3
CSD structure version CSD Version 1. 0 CSD Version 2. 0 reserved
Card Capacity Standard Capacity High Capacity and Extended Capacity
CSD Register Structure
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· TAAC
4G~8G Industrial High Capacity Secure Digital Card
This field is fixed to 0Eh, which indicates 1 ms. The host should not use TAAC, NSAC, and R2W_FACTOR to calculate timeout and should uses fixed timeout values for read and write operations. TAAC bit position code 2:0 time unit 0=1ns, 1=10ns, 2=100ns, 3=1µs, 4=10µs, 5=100µs, 6=1ms, 7=10ms time value 0=reserved, 1=1. 0, 2=1. 2, 3=1. 3, 4=1. 5, 5=2. 0, 6=2. 5, 7=3. 0, 8=3. 5, 9=4. 0, A=4. 5, B=5. 0, C=5. 5, D=6. 0, E=7. 0, F=8. 0 reserved
6:3
7
· NSAC
This field is fixed to 00h. NSAC should not be used to calculate time-out values.
· TRAN_SPEED
The following table defines the maximum data transfer rate per one data line - TRAN_SPEED: TRAN_SPEED bit 2:0 code transfer rate unit 0=100kbit/s, 1=1Mbit/s, 2=10Mbit/s, 3=100Mbit/s, 4. . . 7=reserved time value 0=reserved, 1=1. 0, 2=1. 2, 3=1. 3, 4=1. 5, 5=2. 0, 6=2. 5, 7=3. 0, 8=3. 5, 9=4. 0, A=4. 5, B=5. 0, C=5. 5, D=6. 0, E=7. 0, F=8. 0 reserved
6:3
7
Maximum Data Transfer Rate Definition
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4G~8G Industrial High Capacity Secure Digital Card
Note that for current SD Memory Cards that field must be always 0_0110_010b (032h) which is equal to 25MHz - the mandatory maximum operating frequency of SD Memory Card. In High-Speed mode, that field must be always 0_1011_010b (05Ah) which is equal to 50MHz. And when the timing mode returns to the default by CMD6 or CMD0 command, its value will be 032h.
· CCC
The SD Memory Card command set is divided into subsets (command classes). The card command class register CCC defines which command classes are supported by this card. A value of `1' in a CCC bit means that the corresponding command class is supported. 11 class 11 Supported card command class class 0 class 1
Supported Card Command Classes
· READ_BL_LEN
This field is fixed to 9h, which indicates READ_BL_LEN=512 Byte.
· READ_BL_PARTIAL
This field is fixed to 0, which indicates partial block read is inhibited and only unit of block access is allowed.
· WRITE_BLK_MISALIGN
This field is fixed to 0, which indicates that write access crossing physical block boundaries is always disabled in SDHC and SDXC Cards.
· READ_BLK_MISALIGN
This field is fixed to 0, which indicates that read access crossing physical block boundaries is always disabled in SDHC and SDXC Cards.
· DSR_IMP
Defines if the configurable driver stage is integrated on the card. If set, a driver stage register (DSR) must be implemented also.
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DSR_IMP 0 1 DSR type
4G~8G Industrial High Capacity Secure Digital Card
no DSR implemented DSR implemented
DSR Implementation Code Table
· C_SIZE
This field is expanded to 22 bits and can indicate up to 2 TBytes (It is the same as the maximum memory space specified by a 32-bit block address. ) This parameter is used to calculate the user data area capacity in the SD memory card (not include the protected area). The user data area capacity is calculated from C_SIZE as follows: memory capacity = (C_SIZE+1) * 512K byte The Minimum user area size of SDHC Card is 4, 211, 712 sectors (2GB + 8. 5MB). The Minimum value of C_SIZE for SDHC in CSD Version 2. 0 is 001010h (4112). The maximum user area size of SDHC Card is (32GB - 80MB) The maximum value of C_SIZE for SDHC in CSD Version 2. 0 is 00FF5Fh (65375). The Minimum user area size of SDXC Card is 67, 108, 864 sectors (32GB). The Minimum value of C_SIZE for SDXC in CSD Version 2. 0 is 00FFFFh (65535).
· ERASE_BLK_EN
This field is fixed to 1, which means the host can erase one or multiple units of 512 bytes.
· SECTOR_SIZE
This field is fixed to 7Fh, which indicates 64 KBytes. [. . . ] All conditions shall be satisfied for each version. The other combination of conditions is not allowed. Essential conditions to indicate Version 1. 01 Card (SD_SPEC=0 and SD_SPEC3=0) (1)The card does not support CMD6 (2)The card does not support CMD8 (3) User area capacity shall be up to 2GB Essential conditions to indicate Version 1. 10 Card (SD_SPEC=1 and SD_SPEC3=0) (1) The card shall support CMD6 (2) The card does not support CMD8 (3) User area capacity shall be up to 2GB Essential conditions to indicate Version 2. 00 Card (SD_SPEC=2 and SD_SPEC3=0)
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4G~8G Industrial High Capacity Secure Digital Card
(1) The card shall support CMD6 (2) The card shall support CMD8 (3) The card shall support CMD42 (4) User area capacity shall be up to 2GB (SDSC) or 32GB (SDHC) (5) Speed Class shall be supported (SDHC) Essential conditions to indicate Version 3. 00 Card (SD_SPEC=2 and SD_SPEC3=1) (1) The card shall support CMD6 (2) The card shall support CMD8 (3) The card shall support CMD42 (4) User area capacity shall be up to 2GB (SDSC) or 32GB (SDHC) User area capacity shall be more than or equal to 32GB and up to 2TB (SDXC) (5) Speed Class shall be supported (SDHC or SDXC) A card supports any of following functions shall satisfy essential conditions of Version 3. 00 Card (1) Speed Class supported under the conditions defined in Ver3. 00 (2) UHS-I supported card (3) CMD23 supported card Application Notes: When checking SD_SPEC version in SCR, the host shall not forget that higher SD_SPEC version may be specified in future. It is important to keep compatibility for future version.
· DATA_STAT_AFTER_ERASE
Defines the data status after erase, whether it is `0' or `1' (the status is card vendor dependent).
· SD_SECURITY
This field indicates CPRM Security Specification Version for each capacity card. [. . . ]