User manual TRANSCEND TS8GJF110

[. . . ] MIL STD Method 1009 10. 000 mating cycles; test procedure: tbd. 10N 0. 15N. m or +/-2. 5 deg 1. 5m free fall UV: 254nm, 15Ws/cm² according to ISO 7816-1 0. 1 Gy of medium-energy radiation (70 keV to 140 keV, cumulative dose per year) to both sides of the card, according to ISO7816-1. No warp page; no mold skin; complete form; no cavities surface smoothness <= -0. 1 mm/cm² within contour; no cracks; no pollution (fat, oil dust, etc. ) minimum 1000 Cycles(@Slide force 0. 4N to 5N) Durability Bending Torque Drop test UV light exposure X-ray exposure Visual inspection Shape and form WP Switch cycles Minimum moving force of WP witch 40gf (Ensures that the WP switch will not slide while it is inserted to the connector. ) Transcend Information Inc. 9 TS4G-32GSDHC2-P2 TS4G-32GSDHC2-P2 Register Information SDHC Memory Card + Reader P2 Within the card interface six registers are defined: OCR, CID, CSD, RCA, DSR and SCR. These can be accessed only by corresponding commands (see Chapter 4. 7). [. . . ] The Card Capacity status bit is valid after the card power up procedure is completed and the card power up status bit is set to 1. The Host shall read this status bit to identify a Standard or High Capacity SD Memory Card. The OCR register shall be implemented by the cards. OCR Register Definition Transcend Information Inc. 10 TS4G-32GSDHC2-P2 TS4G-32GSDHC2-P2 SDHC Memory Card + Reader P2 1) This bit is valid only when the card power up status bit is set. 2) This bit is set to LOW if the card has not finished the power up routine. The supported voltage range is coded as shown in Table 5-1. A voltage range is not supported if the corresponding bit value is set to LOW. As long as the card is busy, the corresponding bit (31) is set to LOW. 2. CID Register The Card IDentification (CID) register is 128 bits wide. It contains the card identification information used during the card identification phase. Every individual flash card shall have a unique identification number. The structure of the CID register is defined in the following paragraphs: · MID An 8-bit binary number that identifies the card manufacturer. In High-Speed mode, that field must be always 0_1011_010b (05Ah) which is equal to 50MHz. And when the timing mode returns to the default by CMD6 or CMD0 command, its value will be 032h. · CCC The SD Memory Card command set is divided into subsets (command classes). The card command class register CCC defines which command classes are supported by this card. Host should not use this field. Transcend Information Inc. 16 TS4G-32GSDHC2-P2 TS4G-32GSDHC2-P2 · COPY SDHC Memory Card + Reader P2 Defines if the contents is original (= `0') or has been copied (='1'). The COPY bit for OTP and MTPdevices, sold to end consumers, is set to `1' which identifies the card contents as a copy. The COPY bit is an one time programmable bit. · PERM_WRITE_PROTECT Permanently protects the whole card content against overwriting or erasing (all write and erase commands for this card are permanently disabled). not permanently write protected. · TMP_WRITE_PROTECT Temporarily protects the whole card content from being overwritten or erased (all write and erase commands for this card are temporarily disabled). not write protected. · FILE_FORMAT This field is set to 0. Host should not use this field. · CRC The CRC field carries the check sum for the CSD contents. The checksum has to be recalculated by the host for any CSD modification. The default corresponds to the initial CSD contents. [. . . ] This register shall be set in the factory by the SD Memory Card manufacturer. The following table describes the SCR register content. · SCR_STRUCTURE Version number of the related SCR structure in the SD Memory Card Physical Layer Specification. SCR Register Structure Version · SD_SPEC Describes the SD Memory Card Physical Layer Specification version supported by this card. SD_SPEC 0 1 2 3-15 Physical Layer Specification Version Number Version 1. 0-1. 01 Version 1. 10 Version 2. 00 reserved Physical Layer Specification Version · DATA_STAT_AFTER_ERASE Transcend Information Inc. 19 TS4G-32GSDHC2-P2 TS4G-32GSDHC2-P2 SDHC Memory Card + Reader P2 Defines the data status after erase, whether it is `0' or `1' (the status is card vendor dependent). · SD_SECURITY Describes the security algorithm supported by the card. SD Supported Security Algorithm Note that it is mandatory for a regular writable SD Memory Card to support Security Protocol. For ROM (Read Only) and OTP (One Time Programmable) types of the SD Memory Card, the security feature is optional. [. . . ]