User manual TRANSCEND TS8GJFT3W

[. . . ] 10N 0. 15N. m or +/-2. 5 deg 1. 5m free fall UV: 254nm, 15Ws/cm² according to ISO 7816-1 0. 1 Gy of medium-energy radiation (70 keV to 140 keV, cumulative dose per year) to both sides of the card, according to ISO7816-1. No warp page; no mold skin; complete form; no cavities surface smoothness <= -0. 1 mm/cm² within contour; no cracks; no pollution (fat, oil dust, etc. ) minimum 1000 Cycles(@Slide force 0. 4N to 5N) Moisture and corrosion Durability Bending Torque Drop test UV light exposure X-ray exposure Visual inspection Shape and form WP Switch cycles Minimum moving force of WP witch 40gf (Ensures that the WP switch will not slide while it is inserted to the connector. ) Transcend Information Inc. 10 SDHC Card seriies SDHC Card ser es Register Information 4~32GB High Capacity Secure Digital Card Within the card interface six registers are defined: OCR, CID, CSD, RCA, DSR and SCR. These can be accessed only by corresponding commands (see Chapter 4. 7). The OCR, CID, CSD and SCR registers carry the card/content specific information, while the RCA and DSR registers are configuration registers storing actual configuration parameters. 1. [. . . ] Bit 30 - Card capacity status bit, this status bit is set to 1 if card is High Capacity SD Memory Card. 0 indicates that the card is Standard Capacity SD Memory Card. The Card Capacity status bit is valid after the card power up procedure is completed and the card power up status bit is set to 1. The Host shall read this status bit to identify a Standard or High Capacity SD Memory Card. The OCR register shall be implemented by the cards. OCR Register Definition Transcend Information Inc. 11 SDHC Card seriies SDHC Card ser es 4~32GB High Capacity Secure Digital Card 1) This bit is valid only when the card power up status bit is set. 2) This bit is set to LOW if the card has not finished the power up routine. The supported voltage range is coded as shown in Table 5-1. A voltage range is not supported if the corresponding bit value is set to LOW. As long as the card is busy, the corresponding bit (31) is set to LOW. 2. CID Register The Card IDentification (CID) register is 128 bits wide. It contains the card identification information used during the card identification phase. The host should not use TAAC, NSAC, and R2W_FACTOR to calculate timeout and should uses fixed timeout values for read and write operations (See 4. 6. 2). · NSAC This field is fixed to 00h. NSAC should not be used to calculate time-out values. · TRAN_SPEED The following table defines the maximum data transfer rate per one data line - TRAN_SPEED: Transcend Information Inc. 15 SDHC Card seriies SDHC Card ser es 4~32GB High Capacity Secure Digital Card Note that for current SD Memory Cards that field must be always 0_0110_010b (032h) which is equal to 25MHz - the mandatory maximum operating frequency of SD Memory Card. In High-Speed mode, that field must be always 0_1011_010b (05Ah) which is equal to 50MHz. The High Capacity SD Memory Card does not support write protected groups. · R2W_FACTOR This field is fixed to 2h, which indicates 4 multiples. Write timeout can be calculated by multiplying the read access time and R2W_FACTOR. However, the host should not use this factor and should use 250 ms for write timeout · WRITE_BL_LEN This field is fixed to 9h, which indicates WRITE_BL_LEN=512 Byte. · WRITE_BL_PARTIAL This field is fixed to 0, which indicates partial block read is inhibited and only unit of block access is allowed. · FILE_FORMAT_GRP This field is set to 0. Host should not use this field. Transcend Information Inc. 17 SDHC Card seriies SDHC Card ser es · COPY 4~32GB High Capacity Secure Digital Card Defines if the contents is original (= `0') or has been copied (='1'). The COPY bit for OTP and MTPdevices, sold to end consumers, is set to `1' which identifies the card contents as a copy. The COPY bit is an one time programmable bit. · PERM_WRITE_PROTECT Permanently protects the whole card content against overwriting or erasing (all write and erase commands for this card are permanently disabled). not permanently write protected. · TMP_WRITE_PROTECT Temporarily protects the whole card content from being overwritten or erased (all write and erase commands for this card are temporarily disabled). not write protected. · FILE_FORMAT This field is set to 0. [. . . ] The value0x0000 is reserved to set all cards into the Stand-by State with CMD7. 5. DSR Register (Optional) The 16-bit driver stage register is described in detail in Chapter 6. 5. It can be optionally used to improve the bus performance for extended operating conditions (depending on parameters like bus length, transfer rate or number of cards). The CSD register carries the information about the DSR register usage. [. . . ]