User manual TYAN TOMCAT I810EF

[. . . ] Tomcat i810ef Motherboard Users Manual Revision 1. 20 Tyan S2420 Copyright Tyan Computer Corporation, 2000. No part of this manual may be reproduced or translated without prior written consent from Tyan Computer Corp. All registered and unregistered trademarks and company names contained in this manual are property of their respective companies including, but not limited to the following. AMI is a trademark of American Megatrend Incorporated Windows is a trademark of Microsoft Corporation. [. . . ] The settings are: Se tting Disabled Enabled Cached D e s cription The contents of the video RO M are not copied to RAM. The contents of the designated RO M area are copied (shadowed) from RO M to RAM for faster execution. The contents of the designated RO M area are copied from RO M to RAM and can be written to or read from cache memory. http://www. tyan. com 40 Advanced Chipset Setup Choose Chipset Setup on the AMIBIOS Setup main menu. All Chipset Setup options are then displayed. AMIBIOS Setup can be customized via AMIBCP. See the AMIBIOS Utilities Guide for additional information. AMI BIOS EASY SETUP UTILITY Ver. 1. 17 (c)1998 American Megatrends, Inc. All Rights Reserved Advanced Advanced CMOS Setup Advanced Chipset Setup Power Management Setup Plug and Play Setup Peripheral Setup Change Language Setting [ Enter ] [ Enter ] [ Enter ] [ Enter ] [ Enter ] Engish Setup Help Advanced Chipset setup for configuring chipset features BIOS Previous Item Next Item Select Menu ESC:Exit Enter:Select F5:Setup Defaults F6:Original Values F10:Save & Exit Advanced Chipset Setup Default Settings Chart Tr vtPv Pv hy9r shy AhvyThsr 9r shy USB Function USB KB / M o use Legacy Suppo rt CPU Latency Timer DRA M P age Clo sing P o licy CD Hole M emo ry Hole DRA M Refresh Rate DRA M Cycle Time A ddr Setup Time CAS# Latency RAS to CA S Delay SDRA M RA S# P recharge S2420 Tomcat i810ef Enabled Disabled Disabled Clo sed Disabled Disabled 1 us 5. 6 1 1 A uto A uto A uto Enabled Disabled Disabled Closed Disabled Disabled 1 us 5. 6 1 1 A uto A uto A uto 41 Chapter 3 BIOS Configuration Settings Chart (continued) Tr v t P v P v h y9r s h y Ah vy Th s r 9r s h y D is play C ac he Windo w Size C P U F req Selec t C P U F req R at io Init ialize D is play C ac he M em o ry P aging M o de C o ntro l R A S to C A S C A S Latenc y R A S T im ing R A S P rec harge T im ing IC H D ec o de Selec t G am e P o rt A C P U B IST Enable D M A -0 T ype D M A -1 T ype D M A -2 T ype D M A -3 T ype D M A -5 T ype D M A -6 T ype D M A -7 T ype IC H D elayed T rans ac t io n IC H D C B Enable M em o ry D et ec t io n M o de C P U C lo c k F requenc y Lo c al M em o ry F requenc y Selec t 64M B So f t ware x4 Enabled O pen D ef ault F as t F as t F as t Subt rac t iv e Enabled D is abled LP C D M A LP C D M A LP C D M A LP C D M A LP C D M A LP C D M A LP C D M A D is abled D is abled A ut o Only A ut o 100M H z 64M B So f tware x4 Enabled O pen D ef ault Slo w Slo w Slo w Subt rac t iv e Enabled D is abled LP C D M A LP C D M A LP C D M A LP C D M A LP C D M A LP C D M A LP C D M A D is abled D is abled A ut o Only A ut o 100 M H z USB Function Set this option to Enabled to enable USB (Universal Serial Bus) support. USB KB/Mouse Legacy Support Set this option to Enabled to enable support for older keyboards and mouse devices if the USB Function option is set to Enabled. CPU Latency Timer This option only appears if the USB Function option is set to Enable. The settings are as follows: 6HWWLQ J 'H VFULSWLRQ U u r8Q V p p yrv y qrs r rqhs rir v tu r yqv T T hyys " @ hiyr q h qh s rh u r 6 9 T vt h yu hh v rq p y p x 9 vhiyrq U u r8Q V p p yrvqr sr r qv rqvh r y h s r rpr v v th u r6 9 T vt hy http://www. tyan. com 42 DRAM Page Closing Policy The settings are Closed or Open. If set to Closed, DRAM pages tend to be closed after use. If set to Open, DRAM pages tend to be left open. CD Hole If set to Enabled, access to the address range 000DC000h - 000DFFFFh is controlled by bits 3-2 of the PAM register. If set to Disabled, all request for access to this address range are forwarded to the hub link. Memory Hole This option specifies the location of an area of memory that cannot be addressed on the ISA bus. The settings are Disabled, 512KB-640KB, or 15MB16MB. BIOS DRAM Refresh Rate This option specifies the interval between refresh signals to DRAM system memory. The settings are 15. 6 us (microseconds), 7. 9 us, or FR 128 CLKs. DRAM Cycle Time This optional specifies the length of the DRAM cycle time in SCLKs. Addr Setup Time This option specifies the address set up time in SCLKs. If set to Enabled, a new address is set up in the same clock cycle that asserts CS#. If set to Disabled, CS# is asserted in the clock cycle after the address was issued. CAS# Latency This option specifies the number of SCLKs between the time when the Read command is sampled by DRAM and the Whitney Sample reads data from SDRAM. [. . . ] SRAM Static RAM, unlike DRAM, does not need to be refreshed in order to prevent data loss. In Standby mode, the video and fixed disk drive shut down; all other devices operate normally. UltraDMA/33/66 is a fast version of the old DMA channel. Without UltraDMA your system cannot take advantage of the higher data transmission rates of the new UltraATA hard drives. [. . . ]